Datasheet

LM10506
www.ti.com SNVS729E –SEPTEMBER 2011–REVISED MARCH 2013
Buck 2 Electrical Characteristics
(1)(2)(3)
Unless otherwise noted, V
IN
= 5.0V where: V
IN
=V
IN_B1
= V
IN_B2
= V
IN_B3
. Limits appearing in normal type apply for T
J
= 25°C.
Limits appearing in boldface type apply over the entire operating junction temperature range of −40°C ≤ T
A
= T
J
≤ +85°C.
Symbol Parameter Conditions Min Typ Max Units
I
Q
DC Bias Current in V
IN
No Load, PFM Mode 15 50 µA
I
PEAK
Peak switching current limit Buck 2 enabled, switching in PWM 0.65 1.1 1.55 A
η Efficiency peak, Buck 2
(4)
I
OUT
= 0.3A 90 %
F
SW
Switching Frequency 1.75 2 2.3 MHz
C
IN
Input Capacitor
(4)
4.7
µF
Output Filter Capacitor
10 10 100
(4)
C
OUT
0mA ≤ I
OUT
≤ 400 mA
Output Capacitor ESR
(4)
20 mΩ
L Output Filter Inductance
(4)
2.2 µH
DC Line regulation
(4)
3.3V ≤ V
IN
≤ 5.0V, I
OUT
= 400 mA 0.5 %/V
ΔVOUT
DC Load regulation
(4)
100 mA ≤ I
OUT
≤ 400 mA 0.3 %/A
I
FB
Feedback pin input bias current V
FB
= 1.8V 1.8 5 µA
135
R
DS-ON-HS
High Side Switch On Resistance
V
IN
= 2.6V 260 mΩ
R
DS-ON-LS
Low Side Switch On Resistance 85 190
STARTUP
Startup from shutdown, V
OUT
= 0V, no
load, LC = recommended circuit, using
T
START
Internal soft-start (turn on time)
(5)
0.1 ms
software enable, to V
OUT
= 95% of final
value
(1) All limits are ensured by design, test and/or statistical analysis. All electrical characteristics having room-temperature limits are tested
during production with T
J
= 25°C. All hot and cold limits are ensured by correlating the electrical characteristics to process and
temperature variations and applying statistical process control.
(2) Capacitors: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) are used in setting electrical characteristics.
(3) BUCK normal operation is ensured if V
IN
≥ V
OUT
+1.0V.
(4) Specification ensured by design. Not tested during production.
(5) Specification ensured by design. Not tested during production.
Buck 3 Electrical Characteristics
(1)(2)(3)
Unless otherwise noted, V
IN
= 5.0V where: V
IN
= V
IN_B1
= V
IN_B2
= V
IN_B3
. Limits appearing in normal type apply for T
J
= 25°C.
Limits appearing in boldface type apply over the entire operating junction temperature range of −40°C ≤ T
A
= T
J
≤ +85°C.
Symbol Parameter Conditions Min Typ Max Units
I
Q
DC Bias Current in V
IN
No Load, PFM Mode 15 50 µA
I
PEAK
Peak switching current limit Buck 3 enabled, switching in PWM 0.9 1.2 1.7 A
η Efficiency peak, Buck 3
(4)
I
OUT
= 0.3A 90 %
F
SW
Switching Frequency 1.75 2 2.3 MHz
C
IN
Input Capacitor
(4)
4.7
µF
Output Filter Capacitor
(4)
10 10 100
C
OUT
0mA ≤ I
OUT
≤ 600 mA
Output Capacitor ESR
(4)
20 mΩ
L Output Filter Inductance
(4)
2.2 µH
DC Line regulation
(4)
3.3V ≤ V
IN
≤ 5.0V, I
OUT
= 600 mA 0.5 %/V
ΔVOUT
DC Load regulation
(4)
150 mA ≤ I
OUT
≤ 600 mA 0.3 %/A
I
FB
Feedback pin input bias current V
FB
= 1.2V 0.9 5 µA
(1) All limits are ensured by design, test and/or statistical analysis. All electrical characteristics having room-temperature limits are tested
during production with T
J
= 25°C. All hot and cold limits are ensured by correlating the electrical characteristics to process and
temperature variations and applying statistical process control.
(2) Capacitors: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) are used in setting electrical characteristics.
(3) BUCK normal operation is ensured if V
IN
≥ V
OUT
+1.0V.
(4) Specification ensured by design. Not tested during production.
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