Datasheet

LM10506
SNVS729E SEPTEMBER 2011REVISED MARCH 2013
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General Electrical Characteristics
(1)(2)
(continued)
Unless otherwise noted, V
IN
= 5.0V where: V
IN
= V
IN_B1
= V
IN_B2
= V
IN_B3
. Limits appearing in normal type apply for T
J
= 25°C.
Limits appearing in boldface type apply over the entire operating junction temperature range of 40°C T
A
= T
J
+85°C.
Symbol Parameter Conditions Min Typ Max Units
SPI_CS, SPI_DI, SPI_CLK, HL_B2,
2
Input current, pin
STANDBY
I
IL
µA
driven low
HL_B3, RESET 5
SPI_CS, SPI_DI, SPI_CLK, HL_B3,
2
Input current, pin
RESET
I
IH
µA
driven high
HL_B2, STANDBY 5
f
SPI_MAX
SPI max frequency 10 MHz
t
RESET
2
Minimum high-pulse
µsec
width
(3)
t
STANDBY
2
(3) Specification ensured by design. Not tested during production.
Buck 1 Electrical Characteristics
(1)(2)(3)
Unless otherwise noted, V
IN
= 5.0V where: V
IN
=V
IN_B1
= V
IN_B2
= V
IN_B3
. Limits appearing in normal type apply for T
J
= 25°C.
Limits appearing in boldface type apply over the entire operating junction temperature range of 40°C T
A
= T
J
+85°C.
Symbol Parameter Conditions Min Typ Max Units
I
Q
DC Bias Current in V
IN
No Load, PFM Mode 15 50 µA
I
PEAK
Peak switching current limit Buck 1 enabled, switching in PWM 1.6 1.8 2.1 A
η Efficiency peak, Buck 1
(4)
I
OUT
= 0.3A 90 %
F
SW
Switching Frequency 1.75 2 2.3 MHz
C
IN
Input Capacitor
(4)
4.7
µF
Output Filter Capacitor
(4)
10 10 100
C
OUT
0mA I
OUT
1.3A
Output Capacitor ESR
(4)
20 m
L Output Filter Inductance
(4)
2.2 µH
DC Line regulation
(4)
3.3V V
IN
5.0V, I
OUT
= 1.3A 0.5 %/V
ΔVOUT
DC Load regulation
(4)
0.13A I
OUT
1.3A 0.3 %/A
I
FB
Feedback pin input bias current V
FB
= 3.0V 2.1 5 µA
135
High Side Switch On
R
DS-ON-HS
m
Resistance
V
IN
= 2.6V 215
R
DS-ON-LS
Low Side Switch On Resistance 85 190 m
Used in parallel with the high side FET
while in Bypass mode. Resistance
(DCR) of inductor = 100 m
R
DS-ON_BYPASS
Bypass FET On Resistance
V
IN
= 3.3V 85
m
V
IN
= 2.6V 120
STARTUP
Startup from shutdown, V
OUT
= 0V, no
Internal soft-start (turn on time) load, LC = recommended circuit, using
T
START
0.1 ms
(4)
software enable, to V
OUT
= 95% of final
value
(1) All limits are ensured by design, test and/or statistical analysis. All electrical characteristics having room-temperature limits are tested
during production with T
J
= 25°C. All hot and cold limits are ensured by correlating the electrical characteristics to process and
temperature variations and applying statistical process control.
(2) Capacitors: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) are used in setting electrical characteristics.
(3) BUCK normal operation is ensured if V
IN
V
OUT
+1.0V.
(4) Specification ensured by design. Not tested during production.
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