Datasheet

LM10506
www.ti.com SNVS729E –SEPTEMBER 2011–REVISED MARCH 2013
Figure 29. Possible PCB Layout Configuration to Use
6X Through Hole Vias in the Middle
Outside 7x7 array 0.4 mm DSBGA 34-bump, with 24 peripheral and 6 inner vias = 30 individual signals
PCB LAYOUT THERMAL DISSIPATION FOR DSBGA PACKAGE
1. Position ground layer as close as possible to DSBGA package. Second PCB layer is usually good option.
LM10506 evaluation board is a good example.
2. Draw power traces as wide as possible. Bumps which carry high currents should be connected to wide
traces. This helps the silicon to cool down.
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