Datasheet

LM10506
SNVS729E –SEPTEMBER 2011–REVISED MARCH 2013 www.ti.com
HL_B2, HL_B3 FUNCTION
The HL_B2/3 pins are digital pins which control alternate voltage selections of Buck 2 and Buck 3, respectively.
HL_B2 has an internal pulldown which defaults to a 1.8V output voltage selection for Buck 2. Alternatively, if
HL_B2 is driven high, an output voltage of 3.0V (or 2.0V for LM10506-A) is selected. HL_B3 has an internal
pullup which defaults to a 1.2V output voltage selection for Buck 3. Alternatively, if HL_B3 is driven low, an
output voltage of 1.0V is selected. The pullup resistor is connected to the main input voltage. Transitions of the
pins will not affect the output voltage, the state is only checked during startup.
UNDERVOLTAGE LOCKOUT (UVLO)
The V
IN
voltage is monitored for a supply under voltage condition, for which the operation of the device can not
be ensured. The part will automatically disable Buck 3. To prevent unstable operation, the undervoltage lockout
(UVLO) has a hysteresis window of about 300 mV. An UVLO will force the device into the reset state, all internal
registers are reset. Once the supply voltage is above the UVLO hysteresis, the device will initiate a power-up
sequence and then enter the active state.
Buck 1 and Buck 2 will remain in bypass mode after V
IN
passes the UVLO until V
IN
reaches approximately 1.9V.
When Buck 2 is set to 1.8V, the voltage will jump from 1.8V to V
UVLO_FALLING
, and then follow V
IN
.
For LM10506 -C, -D,when Buck 1 is re-enabled upon exiting STANDBY, soft start will engage.
The LDO and the Comparator will remain functional past the UVLO threshold until V
IN
reaches approximately
2.25V.
OVERVOLTAGE LOCKOUT (OVLO)
The V
IN
voltage is monitored for a supply over voltage condition, for which the operation of the device cannot be
ensured. The purpose of overvoltage lockout (OVLO) is to protect the part and all other consumers connected to
the PMU outputs from any damage and malfunction. Once V
IN
rises over 5.7V all the Bucks, and LDO will be
disabled automatically. To prevent unstable operation, the OVLO has a hysteresis window of about 100 mV. An
OVLO will force the device into the reset state; all internal registers are reset. Once the supply voltage is below
the OVLO hysteresis, the device will initiate a power-up sequence, and then enter the active state. Operating
maximum input voltage at which parameters are ensured is 5.5V. Absolute maximum of the device is 6.0V.
DEVICE STATUS, INTERRUPT ENABLE
The LM10506 has 2 interrupt registers, INTERRUPT ENABLE and INTERRUPT STATUS. These registers can
be read via the serial interface. The interrupts are not latched to the register and will always represent the current
state and will not be cleared on a read.
If interrupt condition is detected, then corresponding bit in the INTERRUPT STATUS register (0x0D) is set to '1',
and IRQ output is asserted. There are 5 interrupt generating conditions:
• Buck 3 output is over flag level (90% when rising, 85% when falling)
• Buck 2 output is over flag level (90% when rising, 85% when falling)
• Buck 1 output is over flag level (90% when rising, 85% when falling)
• LDO is over flag level (90% when rising, 85% when falling
• Comparator input voltage crosses over selected threshold
Reading the interrupt register will not release IRQ output. Interrupt generation conditions can be individually
enabled or disabled by writing respective bits in INTERRUPT ENABLE register (0x0C) to '1' or '0'.
THERMAL SHUTDOWN (TSD)
The temperature of the silicon die is monitored for an over-temperature condition, for which the operation of the
device can not be ensured. The part will automatically be disabled if the temperature is too high. The thermal
shutdown (TSD) will force the device into the reset state. In reset, all circuitry is disabled. To prevent unstable
operation, the TSD has a hysteresis window of about 20°C. Once the temperature has decreased below the TSD
hysteresis, the device will initiate a powerup sequence and then enter the active state. In the active state, the
part will start up as if for the first time, all registers will be in their default state.
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