Datasheet

SW
U1
LM10506
COUT
CONTROL
PVIN
PGND
FB
CIN
L
VINVOUT
P
N
S
S
D
D
G
G
GND
LM10506
www.ti.com SNVS729E –SEPTEMBER 2011–REVISED MARCH 2013
BUCK REGULATORS OPERATION
A buck converter contains a control block, a switching PFET connected between input and output, a synchronous
rectifying NFET connected between the output and ground and a feedback path. The following figure shows the
block diagram of each of the three buck regulators integrated in the device.
Figure 24. Buck Functional Diagram
During the first portion of each switching cycle, the control block turns on the internal PFET switch. This allows
current to flow from the input through the inductor to the output filter capacitor and load. The inductor limits the
current to a ramp with a slope of (V
IN
– V
OUT
)/L by storing energy in a magnetic field. During the second portion
of each cycle, the control block turns the PFET switch off, blocking current flow from the input, and then turns the
NFET synchronous rectifier on. The inductor draws current from ground through the NFET to the output filter
capacitor and load, which ramps the inductor current down with a slope of (–V
OUT
)/L.
The output filter stores charge when the inductor current is high, and releases it when low, smoothing the voltage
across the load. The output voltage is regulated by modulating the PFET switch on time to control the average
current sent to the load. The effect is identical to sending a duty-cycle modulated rectangular wave formed by the
switch and synchronous rectifier at the SW pin to a low-pass filter formed by the inductor and output filter
capacitor. The output voltage is equal to the average voltage at the SW pin.
Buck Regulators Description
The LM10506 incorporates three high-efficiency synchronous switching buck regulators that deliver various
voltages from a single DC input voltage. They include many advanced features to achieve excellent voltage
regulation, high efficiency and fast transient response time. The bucks feature voltage mode architecture with
synchronous rectification.
Each of the switching regulators is specially designed for high-efficiency operation throughout the load range.
With a 2MHz typical switching frequency, the external L- C filter can be small and still provide very low output
voltage ripple. The bucks are internally compensated to be stable with the recommended external inductors and
capacitors as detailed in the application diagram. Synchronous rectification yields high efficiency for low voltage
and high output currents.
All bucks can operate up to a 100% duty cycle allowing for the lowest possible input voltage that still maintains
the regulation of the output. The lowest input to output dropout voltage is achieved by keeping the PMOS switch
on.
Additional features include soft-start, undervoltage lockout, bypass, and current and thermal overload protection.
To reduce the input current ripple, the device employs a control circuit that operates the 3 bucks at 120° phase.
These bucks are nearly identical in performance and mode of operation. They can operate in FPWM (forced
PWM) or automatic mode (PWM/PFM).
PWM Operation
During PWM operation the converter operates as a voltage-mode controller with input voltage feed forward. This
allows the converter to achieve excellent load and line regulation. The DC gain of the power stage is proportional
to the input voltage. To eliminate this dependence, a feed forward voltage inversely proportional to the input
voltage is introduced.
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