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User’s GUI for LM10500 Evaluation Board

Figure 5. User's GUI For The LM10500 Evaluation Board

3. (optional) Check authentication by clicking the ‘Authenticate’ button on the bottom right of the GUI.

Then click ‘R’ on the right of the ‘Auth_OK’ button to read back the authentication result. If ‘PWROK’

and “Auth_OK’ are both ‘1’ (in their depressed positions), then authentication is succeeded and the

GUI is ready to control the LM10500 evaluation board.

4. CTRL+R, or from the menu 'Operations', select 'Read all', the default register values will be read from

the LM10500 and shown in the GUI, as in Figure 6. If the default register setting does not show, press

reset button on the USB2PWI board and repeat this step.

Figure 6. The LM10500 GUI With Default Register Values And Status (LM10500SQ-0.8)

NOTE: Note that picture shows the default values for LM10500SQ-0.8 with PWI1.0. For

LM10500SQ-1.0, R9 is 0H. For PWI2.0 protocol, R4 is 02H,

9.2 GUI Layout and Conventions

Buttons in their depressed position mean that the corresponding bits are equal to 1, logic high, and in the

raised position show the corresponding bits are equal to 0, logic low. '-0-' on a button means the bit is not

used. Reading from unused bits returns '0' and writing to unused bits are ignored.

The top 4 lines of the GUI are the PWI registers of the LM10500. R0 controls the core voltage, ranging

from 00h to 7Fh. R4 shows the PWI version: 01h means PWI1.0 and 02h means PWI2.0. R9 is the core

voltage offset and the default value differs in LM10500SQ-0.8 and LM10500SQ-1.0. The default value of

R9 is 00h in LM10500SQ-1.0 and 40h in LM10500SQ-0.8. The actual core voltage code is determined by

the resulting code of (R0-R9) if (R0-R9) is above zero, otherwise, the core voltage code is zero. R10

enables and disables FPWM and stepping controls. Please refer to the LM10500 datasheet for more

details.

SNVA453A–August 2011–Revised April 2013 AN-2080 LM10500 Evaluation Board

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