Datasheet

LDC1000

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SNOSCX2 –SEPTEMBER 2013

Table 10. LDC Configuration

Address = 0x04, Default=0x1B, Direction=R/W

Bit Field Field Name Description

7:5 Reserved Reserved to 0

4:3 Amplitude Sets the oscillation amplitude

00:1V

01:2V

10:4V

11:Reserved

2:0 Response Time 000: Reserved

001: Reserved

010: 192

011: 384

100: 768

101: 1536

110: 3072

111: 6144

Table 11. Clock Configuration

Address = 0x05, Default=0x01, Direction=R/W

Bit Field Field Name Description

7:2 Reserved Reserved to 0

1 CLK_SEL 1:External Crystal used for Frequency Counter (XIN/XOUT).

0:External Time-Base Clock used for Frequency Counter (TBCLK).

0 CLK_PD 1:Disable External time base clock. Crystal Oscillator Power Down.

0:Enable External time base clock.

Table 12. Comparator Threshold High LSB

Address = 0x06, Default=0xFF, Direction=R/W

Bit Field Field Name Description

7:0 Threshold High LSB Least Significant byte of Threshold High Register. This register is a buffer.

Threshold High[7:0] Read will reflect the current value of Threshold High [7:0] .See register

0x07 for details on Updating the Threshold High register.

Table 13. Comparator Threshold High MSB

Address = 0x07, Default=0xFF, Direction=R/W

Bit Field Field Name Description

7:0 Threshold High MSB Most Significant byte of Threshold High Register. Write to this register

Threshold High[15:8] copies the contents of 0x06 register and Writes to Threshold High

high register write register 0x06 first and then 0x07.

Table 14. Comparator Threshold Low LSB

Address = 0x08, Default=0x00, Direction=R/W

Bit Field Field Name Description

7:0 Threshold Low LSB Least Significant byte of Threshold Low Value. This register is a buffer.

Threshold Low[7:0] Read will reflect the current value of Threshold Low [7:0]. See register

0x09 for details on Updating the Threshold Low register.

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