Datasheet

TMS570LS1224
www.ti.com SPNS190B –OCTOBER 2012–REVISED FEBRUARY 2015
Table 6-30. EMIF Synchronous Memory Switching Characteristics (continued)
NO. Parameter MIN MAX Unit
8 t
oh(CLKH-AIV)
Output hold time, EMIF_CLK rising to 1 ns
EMIF_ADDR[12:0] and EMIF_BA[1:0]
invalid
9 t
d(CLKH-DV)
Delay time, EMIF_CLK rising to 13 ns
EMIF_DATA[15:0] valid
10 t
oh(CLKH-DIV)
Output hold time, EMIF_CLK rising to 1 ns
EMIF_DATA[15:0] invalid
11 t
d(CLKH-RASV)
Delay time, EMIF_CLK rising to 13 ns
EMIF_nRAS valid
12 t
oh(CLKH-RASIV)
Output hold time, EMIF_CLK rising to 1 ns
EMIF_nRAS invalid
13 t
d(CLKH-CASV)
Delay time, EMIF_CLK rising to 13 ns
EMIF_nCAS valid
14 t
oh(CLKH-CASIV)
Output hold time, EMIF_CLK rising to 1 ns
EMIF_nCAS invalid
15 t
d(CLKH-WEV)
Delay time, EMIF_CLK rising to 13 ns
EMIF_nWE valid
16 t
oh(CLKH-WEIV)
Output hold time, EMIF_CLK rising to 1 ns
EMIF_nWE invalid
17 t
dis(CLKH-DHZ)
Delay time, EMIF_CLK rising to 7 ns
EMIF_DATA[15:0] tri-stated
18 t
ena(CLKH-DLZ)
Output hold time, EMIF_CLK rising to 1 ns
EMIF_DATA[15:0] driving
Copyright © 2012–2015, Texas Instruments Incorporated System Information and Electrical Specifications 89
Submit Documentation Feedback
Product Folder Links: TMS570LS1224