Datasheet

TMS570LS1224
SPNS190B –OCTOBER 2012–REVISED FEBRUARY 2015 www.ti.com
Table 6-20. Device Memory Map (continued)
FRAME ADDRESS RANGE RESPNSE FOR ACCESS TO
FRAME CHIP FRAME ACTUAL
MODULE NAME UNIMPLEMENTED LOCATIONS IN
SELECT SIZE SIZE
START END
FRAME
Debug Components
CoreSight Debug Reads return zeros, writes have no
CSCS0 0xFFA0_0000 0xFFA0_0FFF 4KB 4KB
ROM effect
Cortex-R4F Reads return zeros, writes have no
CSCS1 0xFFA0_1000 0xFFA0_1FFF 4KB 4KB
Debug effect
POM CSCS4 0xFFA0_4000 0xFFA0_4FFF 4KB 4KB Abort
Peripheral Control Registers
Reads return zeros, writes have no
HTU1 PS[22] 0xFFF7_A400 0xFFF7_A4FF 256B 256B
effect
Reads return zeros, writes have no
HTU2 PS[22] 0xFFF7_A500 0xFFF7_A5FF 256B 256B
effect
Reads return zeros, writes have no
N2HET1 PS[17] 0xFFF7_B800 0xFFF7_B8FF 256B 256B
effect
Reads return zeros, writes have no
N2HET2 PS[17] 0xFFF7_B900 0xFFF7_B9FF 256B 256B
effect
Reads return zeros, writes have no
GIO PS[16] 0xFFF7_BC00 0xFFF7_BDFF 512B 256B
effect
Reads return zeros, writes have no
MIBADC1 PS[15] 0xFFF7_C000 0xFFF7_C1FF 512B 512B
effect
Reads return zeros, writes have no
MIBADC2 PS[15] 0xFFF7_C200 0xFFF7_C3FF 512B 512B
effect
Reads return zeros, writes have no
I2C PS[10] 0xFFF7_D400 0xFFF7_D4FF 256B 256B
effect
Reads return zeros, writes have no
DCAN1 PS[8] 0xFFF7_DC00 0xFFF7_DDFF 512B 512B
effect
Reads return zeros, writes have no
DCAN2 PS[8] 0xFFF7_DE00 0xFFF7_DFFF 512B 512B
effect
Reads return zeros, writes have no
DCAN3 PS[7] 0xFFF7_E000 0xFFF7_E1FF 512B 512B
effect
Reads return zeros, writes have no
LIN PS[6] 0xFFF7_E400 0xFFF7_E4FF 256B 256B
effect
Reads return zeros, writes have no
SCI PS[6] 0xFFF7_E500 0xFFF7_E5FF 256B 256B
effect
Reads return zeros, writes have no
MibSPI1 PS[2] 0xFFF7_F400 0xFFF7_F5FF 512B 512B
effect
Reads return zeros, writes have no
SPI2 PS[2] 0xFFF7_F600 0xFFF7_F7FF 512B 512B
effect
Reads return zeros, writes have no
MibSPI3 PS[1] 0xFFF7_F800 0xFFF7_F9FF 512B 512B
effect
Reads return zeros, writes have no
SPI4 PS[1] 0xFFF7_FA00 0xFFF7_FBFF 512B 512B
effect
Reads return zeros, writes have no
MibSPI5 PS[0] 0xFFF7_FC00 0xFFF7_FDFF 512B 512B
effect
System Modules Control Registers and Memories
DMA RAM PPCS0 0xFFF8_0000 0xFFF8_0FFF 4KB 4KB Abort
Wrap around for accesses to
VIM RAM PPCS2 0xFFF8_2000 0xFFF8_2FFF 4KB 1KB unimplemented address offsets
between 1KB and 4KB.
Flash Module PPCS7 0xFFF8_7000 0xFFF8_7FFF 4KB 4KB Abort
eFuse Controller PPCS12 0xFFF8_C000 0xFFF8_CFFF 4KB 4KB Abort
Power
Management PPSE0 0xFFFF_0000 0xFFFF_01FF 512B 512B Abort
Module (PMM)
72 System Information and Electrical Specifications Copyright © 2012–2015, Texas Instruments Incorporated
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