Datasheet

TMS570LS1224
www.ti.com SPNS190B –OCTOBER 2012–REVISED FEBRUARY 2015
Table 6-20. Device Memory Map (continued)
FRAME ADDRESS RANGE RESPNSE FOR ACCESS TO
FRAME CHIP FRAME ACTUAL
MODULE NAME UNIMPLEMENTED LOCATIONS IN
SELECT SIZE SIZE
START END
FRAME
eCAP2 0xFCF7_9400 0xFCF7_94FF 256B 256B Abort
eCAP3 0xFCF7_9500 0xFCF7_95FF 256B 256B Abort
eCAP4 0xFCF7_9600 0xFCF7_96FF 256B 256B Abort
eCAP5 0xFCF7_9700 0xFCF7_97FF 256B 256B Abort
eCAP6 0xFCF7_9800 0xFCF7_98FF 256B 256B Abort
eQEP1 0xFCF7_9900 0xFCF7_99FF 256B 256B Abort
eQEP2 0xFCF7_9A00 0xFCF7_9AFF 256B 256B Abort
Cyclic Redundancy Checker (CRC) Module Registers
Accesses above 0x200 generate
CRC CRC frame 0xFE00_0000 0xFEFF_FFFF 16MB 512B
abort.
Peripheral Memories
MIBSPI5 RAM PCS[5] 0xFF0A_0000 0xFF0B_FFFF 128KB 2KB Abort for accesses above 2KB
MIBSPI3 RAM PCS[6] 0xFF0C_0000 0xFF0D_FFFF 128KB 2KB Abort for accesses above 2KB
MIBSPI1 RAM PCS[7] 0xFF0E_0000 0xFF0F_FFFF 128KB 2KB Abort for accesses above 2KB
Wrap around for accesses to
unimplemented address offsets lower
DCAN3 RAM PCS[13] 0xFF1A_0000 0xFF1B_FFFF 128KB 2KB
than 0x7FF. Abort generated for
accesses beyond offset 0x800.
Wrap around for accesses to
unimplemented address offsets lower
DCAN2 RAM PCS[14] 0xFF1C_0000 0xFF1D_FFFF 128KB 2KB
than 0x7FF. Abort generated for
accesses beyond offset 0x800.
Wrap around for accesses to
unimplemented address offsets lower
DCAN1 RAM PCS[15] 0xFF1E_0000 0xFF1F_FFFF 128KB 2KB
than 0x7FF. Abort generated for
accesses beyond offset 0x800.
Wrap around for accesses to
unimplemented address offsets lower
MIBADC2 RAM 8KB
than 0x1FFF. Abort generated for
accesses beyond 0x1FFF.
Look-Up Table for ADC2 wrapper.
PCS[29] 0xFF3A_0000 0xFF3B_FFFF 128KB
Starts at address offset 0x2000 and
MIBADC2 Look- ends at address offset 0x217F. Wrap
384B
Up Table around for accesses between offsets
0x0180 and 0x3FFF. Abort generated
for accesses beyond offset 0x4000.
Wrap around for accesses to
unimplemented address offsets lower
MIBADC1 RAM 8KB
than 0x1FFF. Abort generated for
accesses beyond 0x1FFF.
Look-Up Table for ADC1 wrapper.
PCS[31] 0xFF3E_0000 0xFF3F_FFFF 128KB
Starts at address offset 0x2000 and
MibADC1 Look- ends at address offset 0x217F. Wrap
384B
Up Table around for accesses between offsets
0x0180 and 0x3FFF. Abort generated
for accesses beyond offset 0x4000.
Wrap around for accesses to
unimplemented address offsets lower
N2HET2 RAM PCS[34] 0xFF44_0000 0xFF45_FFFF 128KB 16KB
than 0x3FFF. Abort generated for
accesses beyond 0x3FFF.
Wrap around for accesses to
unimplemented address offsets lower
N2HET1 RAM PCS[35] 0xFF46_0000 0xFF47_FFFF 128KB 16KB
than 0x3FFF. Abort generated for
accesses beyond 0x3FFF.
HTU2 RAM PCS[38] 0xFF4C_0000 0xFF4D_FFFF 128KB 1KB Abort
HTU1 RAM PCS[39] 0xFF4E_0000 0xFF4F_FFFF 128KB 1KB Abort
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