Datasheet

TMS570LS1224
SPNS190B –OCTOBER 2012–REVISED FEBRUARY 2015 www.ti.com
6.9.2 Memory Map Table
Table 6-20. Device Memory Map
FRAME ADDRESS RANGE RESPNSE FOR ACCESS TO
FRAME CHIP FRAME ACTUAL
MODULE NAME UNIMPLEMENTED LOCATIONS IN
SELECT SIZE SIZE
START END
FRAME
Memories tightly coupled to the ARM Cortex-R4F CPU
TCM Flash CS0 0x0000_0000 0x00FF_FFFF 16MB 1.25MB
TCM RAM + RAM
CSRAM0 0x0800_0000 0x0BFF_FFFF 64MB 192KB
ECC Abort
Flash mirror
Mirrored Flash 0x2000_0000 0x20FF_FFFF 16MB 1.25MB
frame
External Memory Accesses
EMIF Chip Select
EMIF select 2 0x6000_0000 0x63FF_FFFF 64MB 32KB
2 (asynchronous)
EMIF Chip Select
EMIF select 3 0x6400_0000 0x67FF_FFFF 64MB 32KB
3 (asynchronous)
Access to "Reserved" space will
generate Abort
EMIF Chip Select
EMIF select 4 0x6800_0000 0x6BFF_FFFF 64MB 32KB
4 (asynchronous)
EMIF Chip Select
EMIF select 0 0x8000_0000 0x87FF_FFFF 128MB 128MB
0 (synchronous)
Flash Module Bus2 Interface
Customer OTP,
0xF000_0000 0xF000_1FFF 8KB 4KB
TCM Flash Banks
Customer OTP,
0xF000_E000 0xF000_FFFF 8KB 2KB
Bank 7
Customer
OTP–ECC, TCM 0xF004_0000 0xF004_03FF 1KB 512B
Flash Banks
Customer
OTP–ECC, 0xF004_1C00 0xF004_1FFF 1KB 256B
Bank 7
TI OTP, TCM
0xF008_0000 0xF008_1FFF 8KB 4KB
Flash Banks
Abort
TI OTP,
0xF008_E000 0xF008_FFFF 8KB 2KB
Bank 7
TI OTP–ECC,
0xF00C_0000 0xF00C_03FF 1KB 512B
TCM Flash Banks
TI OTP–ECC,
0xF00C_1C00 0xF00C_1FFF 1KB 256B
Bank 7
Bank 7 – ECC 0xF010_0000 0xF013_FFFF 256KB 8KB
Bank 7 0xF020_0000 0xF03F_FFFF 2MB 64KB
Flash Data Space
0xF040_0000 0xF04F_FFFF 1MB 160KB
ECC
EMIF slave interfaces
EMIF Registers 0xFCFF_E800 0xFCFF_E8FF 256B 256B Abort
SCR5: Enhanced Timer Peripherals
ePWM1 0xFCF7_8C00 0xFCF7_8CFF 256B 256B Abort
ePWM2 0xFCF7_8D00 0xFCF7_8DFF 256B 256B Abort
ePWM3 0xFCF7_8E00 0xFCF7_8EFF 256B 256B Abort
ePWM4 0xFCF7_8F00 0xFCF7_8FFF 256B 256B Abort
ePWM5 0xFCF7_9000 0xFCF7_90FF 256B 256B Abort
ePWM6 0xFCF7_9100 0xFCF7_91FF 256B 256B Abort
ePWM7 0xFCF7_9200 0xFCF7_92FF 256B 256B Abort
eCAP1 0xFCF7_9300 0xFCF7_93FF 256B 256B Abort
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