Datasheet
N2HET1
N2HET2
IOMMmuxcontrolsignalx
N2HET1[1,3,5,7,9,11]/N2HET2[8,10,12,14,16,18]
N2HET1[1,3,5,7,9,11]
N2HET2[8,10,12,14,16,18]
TMS570LS1224
SPNS190B –OCTOBER 2012–REVISED FEBRUARY 2015
www.ti.com
Figure 7-12. N2HET Monitoring
7.6.5.2 Output Monitoring using Dual Clock Comparator (DCC)
N2HET1[31] is connected as a clock source for counter 1 in DCC1. This allows the application to measure
the frequency of the pulse-width modulated (PWM) signal on N2HET1[31].
Similarly, N2HET2[0] is connected as a clock source for counter 1 in DCC2. This allows the application to
measure the frequency of the pulse-width modulated (PWM) signal on N2HET2[0].
Both N2HET1[31] and N2HET2[0] can be configured to be internal-only channels. That is, the connection
to the DCC module is made directly from the output of the N2HETx module (from the input of the output
buffer).
For more information on DCC see Section 6.7.3.
7.6.6 Disabling N2HET Outputs
Some applications require the N2HET outputs to be disabled under some fault condition. The N2HET
module provides this capability through the "Pin Disable" input signal. This signal, when driven low,
causes the N2HET outputs identified by a programmable register (HETPINDIS) to be tri-stated. For more
details on the "N2HET Pin Disable" feature, see the device-specific Terminal Reference Manual.
GIOA[5] is connected to the "Pin Disable" input for N2HET1, and GIOB[2] is connected to the "Pin
Disable" input for N2HET2.
134 Peripheral Information and Electrical Specifications Copyright © 2012–2015, Texas Instruments Incorporated
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