Datasheet

TMS570LS1224
www.ti.com SPNS190B –OCTOBER 2012–REVISED FEBRUARY 2015
Table 7-5. ePWMx Switching Characteristics (continued)
PARAMETER TEST CONDITIONS MIN MAX UNIT
t
d(TZ-
Delay time, trip input active to PWM Hi-Z 20 ns
PWM)HZ
Table 7-6. ePWMx Trip-Zone Timing Requirements
PARAMETER TEST CONDITIONS MIN MAX UNIT
t
w(TZ)
Pulse duration, TZn input low Asynchronous 2 * HSPCLKDIV * ns
CLKDIV * t
c(VCLK4)
(1)
Synchronous 2 t
c(VCLK4)
ns
Synchronous, with input 8 t
c(VCLK4)
ns
filter
(1) Refer to the ePWM chapter of the TMS570LS12x/11x Technical Reference Manual (SPNU515) for more information on the clock divider
fields HSPCLKDIV and CLKDIV.
Copyright © 2012–2015, Texas Instruments Incorporated Peripheral Information and Electrical Specifications 115
Submit Documentation Feedback
Product Folder Links: TMS570LS1224