Datasheet

TRST
TMS
TCK
TDI
TDO
RTCK
ICEPICK_C
BoundaryScan
BSR/BSDL
BoundaryScanI/F
SecondaryTap0
DAP
Debug APB
Debug
ROM1
APBslave
Cortex
R4F
APBMux
AHB-AP
POM
toSCR1via A2A
from
PCR1/Bridge
TestTap0
eFuseFarm
SecondaryTap2
AJSM
TestTap1
PSCON
TMS570LS1224
SPNS190B –OCTOBER 2012–REVISED FEBRUARY 2015 www.ti.com
6.21 Debug Subsystem
6.21.1 Block Diagram
The device contains an ICEPICK module to allow JTAG access to the scan chains.
Figure 6-19. Debug Subsystem Block Diagram
6.21.2 Debug Components Memory Map
Table 6-37. Debug Components Memory Map
FRAME ADDRESS RANGE RESPNSE FOR ACCESS TO
FRAME CHIP FRAME ACTUA
MODULE NAME UNIMPLEMENTED LOCATIONS IN
SELECT SIZE L SIZE
START END
FRAME
CoreSight Debug Reads return zeros, writes have no
CSCS0 0xFFA0_0000 0xFFA0_0FFF 4KB 4KB
ROM effect
Cortex-R4F Reads return zeros, writes have no
CSCS1 0xFFA0_1000 0xFFA0_1FFF 4KB 4KB
Debug effect
6.21.3 JTAG Identification Code
The JTAG ID code for this device is the same as the device ICEPick Identification Code.
Table 6-38. JTAG ID Code
Silicon Revision ID
Rev A 0x0B95502F
Rev B 0x2B95502F
Rev C 0x3B95502F
106 System Information and Electrical Specifications Copyright © 2012–2015, Texas Instruments Incorporated
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