Datasheet

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20.3.1.73 DMA Memory Protection Region 2 Start Address Register (DMAMPR2S)
Figure 20-91. DMA Memory Protection Region 2 Start Address Register (DMAMPR2S) [offset =
1C8h]
31 0
STARTADDRESS
R/WP-0
LEGEND: R/W = Read/Write; WP = Write in privilege mode only; -n = value after reset
Table 20-79. DMA Memory Protection Region 2 Start Address Register (DMAMPR2S) Field
Descriptions
Bit Field Description
31-0 STARTADDRESS Start Address defines the address at which the region begins.
20.3.1.74 DMA Memory Protection Region 2 End Address Register (DMAMPR2E)
Figure 20-92. DMA Memory Protection Region 2 End Address Register (DMAMPR2E) [offset =
1CCh]
31 0
ENDADDRESS
R/WP-0
LEGEND: R/W = Read/Write; WP = Write in privilege mode only; -n = value after reset
Table 20-80. DMA Memory Protection Region 2 End Address Register (DMAMPR2E) Field
Descriptions
Bit Field Description
31-0 ENDADDRESS End Address defines the address at which the region ends. The end address usually is larger than the
start address for this region; otherwise the region will wrap around at the end of the address space.
749
SPNU562–May 2014 Direct Memory Access Controller (DMA) Module
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