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Control Registers and Control Packets

20.3.1.69 DMA Memory Protection Region 0 Start Address Register (DMAMPR0S)

Figure 20-87. DMA Memory Protection Region 0 Start Address Register (DMAMPR0S) [offset =

1B8h]

31 0

STARTADDRESS

R/WP-0

LEGEND: R/W = Read/Write; WP = Write in privilege mode only; -n = value after reset

Table 20-75. DMA Memory Protection Region 0 Start Address Register (DMAMPR0S) Field

Descriptions

Bit Field Description

31-0 STARTADDRESS Start Address defines the address at which the region begins.

20.3.1.70 DMA Memory Protection Region 0 End Address Register (DMAMPR0E)

Figure 20-88. DMA Memory Protection Region 0 End Address Register (DMAMPR0E) [offset =

1BCh]

31 0

ENDADDRESS

R/WP-0

LEGEND: R/W = Read/Write; WP = Write in privilege mode only; -n = value after reset

Table 20-76. DMA Memory Protection Region 0 End Address Register (DMAMPR0E)] Field

Descriptions

Bit Field Description

31-0 ENDADDRESS End Address defines the address at which the region ends. The end address usually is larger than the

start address for this region; otherwise, the region will wrap around at the end of the address space.

747

SPNU562–May 2014 Direct Memory Access Controller (DMA) Module

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