Datasheet

Control Registers and Control Packets

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20.3.1.68 DMA Memory Protection Status Register 1 (DMAMPST1)

Figure 20-86. DMA Memory Protection Status Register 1 (DMAMPST1) [offset = 1B4h]

31 25 24 23 17 16

Reserved REG3FT Reserved REG2FT

R-0 R/WC-0 R-0 R/WC-0

15 9 8 7 1 0

Reserved REG1FT Reserved REG0FT

R-0 R/WC-0 R-0 R/WC-0

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 20-74. DMA Memory Protection Status Register 1 (DMAMPST1) Field Descriptions

Bit Field Value Description

31-25 Reserved 0 Read returns 0. Writes have no effect.

24 REG3FT Region 3 fault. This bit determines whether an access permission violation was detected in this region.

0 Read and write: No fault was detected.

1 Read: A fault was detected.

Write: The bit was cleared.

23-17 Reserved 0 Read returns 0. Writes have no effect.

16 REG2FT Region 2 fault. This bit determines whether a access permission violation was detected in this region.

0 Read and write: No fault was detected.

1 Read: A fault was detected.

Write: The bit was cleared.

15-9 Reserved 0 Read returns 0. Writes have no effect.

8 REG1FT Region 1 fault. This bit determines whether an access permission violation was detected in this region.

0 Read and write: No fault was detected.

1 Read: A fault was detected.

Write: The bit was cleared.

7-1 Reserved 0 Read returns 0. Writes have no effect.

0 REG0FT Region 0 fault. This bit determines whether a access permission violation was detected in this region.

0 Read and write: No fault was detected.

1 Read: A fault was detected.

Write: The bit was cleared.

746

Direct Memory Access Controller (DMA) Module SPNU562–May 2014

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