Datasheet
92
RM57L843
SPNS215C –FEBRUARY 2014–REVISED JUNE 2016
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System Information and Electrical Specifications Copyright © 2014–2016, Texas Instruments Incorporated
Table 6-25. Module Registers / Memories Memory Map (continued)
TARGET NAME
MEMORY
SELECT
ADDRESS RANGE
FRAME
SIZE
ACTUAL
SIZE
RESPONSE FOR
ACCESS TO
UNIMPLEMENTED
LOCATIONS IN
FRAME
START END
Memories under User PCR3 (Peripheral Segment 3)
MIBSPI5 RAM
PCS[5] 0xFF0A_0000 0xFF0B_FFFF 128KB 2KB
Abort for accesses
above 2KB
MIBSPI4 RAM
PCS[3] 0xFF06_0000 0xFF07_FFFF 128KB 2KB
Abort for accesses
above 2KB
MIBSPI3 RAM
PCS[6] 0xFF0C_0000 0xFF0D_FFFF 128KB 2KB
Abort for accesses
above 2KB
MIBSPI2 RAM
PCS[4] 0xFF08_0000 0xFF09_FFFF 128KB 2KB
Abort for accesses
above 2KB
MIBSPI1 RAM
PCS[7] 0xFF0E_0000 0xFF0F_FFFF 128KB 4KB
Abort for accesses
above 4KB
DCAN4 RAM
PCS[12] 0xFF18_0000 0xFF19_FFFF 128KB 8KB
Abort generated for
accesses beyond
offset 0x2000
DCAN3 RAM
PCS[13] 0xFF1A_0000 0xFF1B_FFFF 128KB 8KB
Abort generated for
accesses beyond
offset 0x2000
DCAN2 RAM
PCS[14] 0xFF1C_0000 0xFF1D_FFFF 128KB 8KB
Abort generated for
accesses beyond
offset 0x2000
DCAN1 RAM
PCS[15] 0xFF1E_0000 0xFF1F_FFFF 128KB 8KB
Abort generated for
accesses beyond
offset 0x2000.
MIBADC2 RAM
PCS[29] 0xFF3A_0000 0xFF3B_FFFF 128KB 8KB
Wrap around for
accesses to
unimplemented
address offsets
lower than 0x1FFF.
MIBADC1 RAM
PCS[31] 0xFF3E_0000 0xFF3F_FFFF 128KB
8KB
Wrap around for
accesses to
unimplemented
address offsets
lower than 0x1FFF.
MIBADC1 Look-UP Table
384 bytes
Look-Up Table for
ADC1 wrapper.
Starts at address
offset 0x2000 and
ends at address
offset 0x217F. Wrap
around for accesses
between offsets
0x0180 and 0x3FFF.
Abort generation for
accesses beyond
offset 0x4000.
NHET2 RAM
PCS[34] 0xFF44_0000 0xFF45_FFFF 128KB 16KB
Wrap around for
accesses to
unimplemented
address offsets
lower than 0x3FFF.
Abort generated for
accesses beyond
0x3FFF.
NHET1 RAM
PCS[35] 0xFF46_0000 0xFF47_FFFF 128KB 16KB
Wrap around for
accesses to
unimplemented
address offsets
lower than 0x3FFF.
Abort generated for
accesses beyond
0x3FFF.
HET TU2 RAM PCS[38] 0xFF4C_0000 0xFF4D_FFFF 128KB 1KB Abort
HET TU1 RAM PCS[39] 0xFF4E_0000 0xFF4F_FFFF 128KB 1KB Abort
CoreSight Debug Components