Datasheet

T = E • E • F
sz rsz tc tc
www.ti.com Module Operation
20.2.4.1 Initial Source Address
This field stores the absolute 32-bit source address of the DMA transfer.
20.2.4.2 Initial Destination Address
This field stores the absolute 32-bit destination address of the DMA transfer.
20.2.4.3 Initial Transfer Count
The transfer count field is composed of two parts. The frame transfer count value and the element transfer
count value. Each count value is 13 bits wide. As a Single Block transfer maximum of 512 Mbytes of data
can be transferred. Element count and frame count are programmed according to the source data
structure.
The total transfer size is calculated as stated below:
(28)
where
T
sz
= Total Transfer Size
E
rsz
= Read Element Size
E
tc
= Element Transfer Count
F
tc
= Frame Transfer Count
NOTE: A zero element count with a non-zero frame count or a non-zero element count with a zero
frame count are all considered as zero total transfer count. No DMA transaction is initiated
with any of the counters set to 0.
20.2.4.4 Channel Configuration Word
The channel configuration defines the following individual parameters
• Read element size
• Write element size
• Trigger type (frame or block)
• Addressing mode for source
• Addressing mode for destination
• Auto-initiation mode
• Next control packet to be triggered at control packet finish (Channel Chaining)
20.2.4.5 Element/Frame Index Pointer
There are 4 index pointers that allow the creation of different types of buffers in RAM and address
registers in a structured manner: an element index pointer for source and destination and a frame index
pointer for source and destination.
The element index pointer for source and/or destination defines the offset to be added after each element
transfer to the source and/or destination address. The frame index pointer for source and/or destination
defines the offset to be added to the source and/or destination address after the element count reaches
zero. The element and frame index pointers must be defined in terms of the number of bytes of offset. The
DMA controller does not adjust the element/frame index number according to the element size. An index
of 2 means increment the address by 2 and not by 16 when the element size is 64 bits.
20.2.4.6 Current Source Address
The current source address field contains the current working source address during a DMA transaction.
The current source address is incremented during post increment addressing mode or indexing mode.
683
SPNU562–May 2014 Direct Memory Access Controller (DMA) Module
Submit Documentation Feedback
Copyright © 2014, Texas Instruments Incorporated