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Control Registers
13.3.10 CCM-R5F Power Domain Status Register 0 (CCMPDSTAT0)
Figure 13-12. CCM-R5F Power Domain Status Register 0 (CCMPDSTAT0) (Offset = 24h)
31 16
Reserved
R-0
15 6 5 4 3 2 1 0
Reserved DMM_TRANS HTU2_TRANS Reserved
R-0 R-0 R-0 R-0
LEGEND: R = Read only; -n = value after reset
Table 13-17. CCM-R5FPower Domain Status Register 0 (CCMPDSTAT0) Field Descriptions
Bit Field Value Description
31-6 Reserved 0 Reads return to zeros and writes have no effect.
5-4 DMM_TRNS DMM Transaction. When the power domain in which the DMM resides is turned off, an
unexpected bus transaction is detected on DMM master.
Read in User and Privileged mode. Write has no effect.
0 Read: No bus transaction on the master when the power domain is turned off.
Write: Has no effect
Any non-zero Read: An unexpected bus transaction is detected on the master.
value
Write: Has no effect
3-2 HTU2_TRNS HTU2 Transaction. When the power domain in which the HTU2 resides is turned off, an
unexpected bus transaction is detected on HTU2 master.
Read in User and Privileged mode. Write has no effect.
0 Read: No bus transaction on the master when the power domain is turned off.
Write: Has no effect
Any non-zero Read: An unexpected bus transaction is detected on the master.
value
Write: Has no effect
1-0 Reserved 0 Reads return to zeros and writes have no effect.
497
SPNU562–May 2014
CPU Compare Module for Cortex
TM
-R5F (CCM-R5F)
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