Datasheet

65
RM57L843
www.ti.com SPNS215C –FEBRUARY 2014–REVISED JUNE 2016
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System Information and Electrical SpecificationsCopyright © 2014–2016, Texas Instruments Incorporated
6.3 Power Sequencing and Power-On Reset
6.3.1 Power-Up Sequence
There is no timing dependency between the ramp of the VCCIO and the VCC supply voltage. The power-
up sequence starts with the I/O voltage rising above the minimum I/O supply threshold, (for more details,
see Table 6-3), core voltage rising above the minimum core supply threshold and the release of power-on
reset. The high-frequency oscillator will start up first and its amplitude will grow to an acceptable level. The
oscillator start-up time is dependent on the type of oscillator and is provided by the oscillator vendor. The
different supplies to the device can be powered up in any order.
The device goes through the following sequential phases during power up.
Table 6-3. Power-Up Phases
Oscillator start-up and validity check 1024 oscillator cycles
eFuse autoload 3650 oscillator cycles
Flash pump power-up 250 oscillator cycles
Flash bank power-up 1460 oscillator cycles
Total 6384 oscillator cycles
The CPU reset is released at the end of the above sequence and fetches the first instruction from address
0x00000000.