Datasheet

PBIST Control Registers

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9.5.13 RAM Info Mask Upper Register (RINFOU)

This register is to select RAM groups to run the algorithms selected in the ALGO register. For an algorithm

to be executed on a particular RAM group, the corresponding bit in this register should be set to ‘1’. The

default value of this register is all ‘ 1’s, which means all the RAM Info Groups would be selected. Figure 9-

19 and Table 9-18 illustrate this register.

Figure 9-19. RAM Info Mask Upper Register (RINFOU) [offset = 01CCh]

31 24 23 16

RINFOU3 RINFOU2

R/W-FFh R/W-FFh

15 8 7 0

RINFOU1 RINFOU0

R/W-FFh R/W-FFh

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 9-18. RAM Info Mask Upper Register (RINFOU) Field Descriptions

Bit Field Value Description

31 0 RAM Group 64 is not selected

1 Selects group 64 for PBIST run

30 0 RAM Group 63 is not selected

1 Selects RAM group 63 for PBIST run

: :

0 0 RAM Group 33 is not selected

1 Selects RAM Group 33 for PBIST run

31-0 0 None of RAM Groups 33 to 64 are selected

408

Programmable Built-In Self-Test (PBIST) Module SPNU562–May 2014

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