Datasheet

Flash Control Registers

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7.11.23 Raw Address Register (FRAW_ADDR)

Figure 7-32. Raw Address Register (FRAW_ADDR) (offset = 74h)

31 5 4 0

RAW_DATA[31:5] Reserved

RWP-u R-0

LEGEND: R/W = Read/Write; R = Read only; WP = Write in Privilege mode; -n = value after reset -u = Unchanged value on internal reset,

cleared on power up

Table 7-35. Raw Address Register (FRAW_ADDR) Field Descriptions

Bit Field Description

31-5 RAW_DATA Raw Address.

This register is used during the address tag diagnostic test, DIAG_MODE = 5, to replace the address bus

bits 31:3. Lower 5 bits are not compared during the diagnostic.

4-0 Reserved Reads return 0. Writes have no effect.

358

F021 Level 2 Flash Module Controller (L2FMC) SPNU562–May 2014

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