Datasheet

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7.11.13 Flash Bank Power Mode Register (FBPWRMODE)
Figure 7-22. Flash Bank Power Mode Register (FBPWRMODE) (offset = 40h)
31 16
Reserved
R-505h
15 14 13 4 3 2 1 0
BANKPWR7 Reserved BANKPWR1 BANKPWR0
R/WP-3h R-3FFh R/WP-3h R/WP-3h
LEGEND: R/W = Read/Write; R = Read only; WP=Write in Privilege Mode; -n = value after reset
Table 7-25. Flash Bank Power Mode Register (FBPWRMODE) Field Descriptions
Bit Field Value Description
31-16 Reserved 505h Do not write to these register bits.
15-14 BANKPWR7 Bank 7 Power Mode.
0 Bank sleep mode
1h Bank standby mode
2h Reserved
3h Bank active mode
13-4 Reserved 3FFh Do not write to these register bits.
3-2 BANKPWR1 Bank 1 Power Mode.
0 Bank sleep mode
1h Bank standby mode
2h Reserved
3h Bank active mode
1-0 BANKPWR0 Bank 0 Power Mode.
0 Bank sleep mode
1h Bank standby mode
2h Reserved
3h Bank active mode
349
SPNU562–May 2014 F021 Level 2 Flash Module Controller (L2FMC)
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