Datasheet
51
RM57L843
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SPNS215C –FEBRUARY 2014–REVISED JUNE 2016
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Terminal Configuration and FunctionsCopyright © 2014–2016, Texas Instruments Incorporated
4.2.2.1.1 Notes on Output Multiplexing
Table 4-27 lists the output signal multiplexing and control signals for selecting the desired functionality for
each pad.
• The pads default to the signal defined by the "Default Function" in Table 4-27.
• The CTRL x columns in Table 4-27 contain a value of type x[y] which indicates the control register PINMMRx, bit
y. It indicates the multiplexing control register and the bit that must be set in order to select the corresponding
functionality to be output on any particular pad.
– For example, consider the multiplexing on pin H3 for the 337-ZWT package:
337
ZWT
BALL
DEFAULT
FUNCTION
CTRL1 OPTION 2 CTRL2 OPTION 3 CTRL3 OPTION 4 CTRL4 OPTION 5 CTRL5 OPTION 6 CTRL6
H3 GIOA[6] 19[24] N2HET2[4] 19[26] ePWM1B 19[29]
– When GIOA[6] is configured as an output pin in the GIO module control register, then the programmed output
level appears on pin H3 by default. The PINMMR19[24] is set by default to indicate that the GIOA[6] signal is
selected to be output.
– If the application must output the N2HET2[4] signal on pin H3, it must clear PINMMR19[24] and set
PINMMR19[26].
– Note that the pin is connected as input to both the GIO and N2HET2 modules. That is, there is no input
multiplexing on this pin.
• The base address of the IOMM module starts at 0xFFFF_1C00. The Output mux control registers with the first
register PINMMR0 starts at the offset address 0x110 within the IOMM module.