Datasheet
Copyright © 2014–2016, Texas Instruments IncorporatedTerminal Configuration and Functions
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48
RM57L843
SPNS215C –FEBRUARY 2014–REVISED JUNE 2016
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Table 4-27. Output Multiplexing (continued)
Address
Offset
337
ZWT
BALL
DEFAULT
FUNCTION
Select
Bit
Alternate
Function 1
Select
Bit
Alternate
Function 2
Select
Bit
Alternate
Function 3
Select
Bit
Alternate
Function 4
Select
Bit
Alternate
Function 5
Select
Bit
0x15C C1 GIOA[2] 19[0] N2HET2[0] 19[2] eQEP2I 19[5]
E1 GIOA[3] 19[8] N2HET2[2] 19[10]
B5 GIOA[5] 19[16] EXTCLKIN1 19[19] ePWM1A 19[21]
H3 GIOA[6] 19[24] N2HET2[4] 19[26] ePWM1B 19[29]
0x160 M1 GIOA[7] 20[0] N2HET2[6] 20[2] ePWM2A 20[5]
F2 GIOB[2] 20[8] DCAN4TX 20[11]
W10 GIOB[3] 20[16] DCAN4RX 20[19]
J2 GIOB[6] 20[24] nERROR 20[25]
0x164 F1 GIOB[7] 21[0] RESERVED 21[1] nTZ1_2 21[5]
R2 MIBSPI1NCS[0] 21[8] MIBSPI1SOMI[1] 21[9] MII_TXD[2] 21[10] ECAP6 21[13]
F3 MIBSPI1NCS[1] 21[16] MII_COL 21[18] N2HET1[17] 21[19] eQEP1S 21[21]
G3 MIBSPI1NCS[2] 21[24] MDIO 21[26] N2HET1[19] 21[27]
0x168 J3 MIBSPI1NCS[3] 22[0] N2HET1[21] 22[3] nTZ1_3 22[5]
G19 MIBSPI1NENA 22[8] MII_RXD[2] 22[10] N2HET1[23] 22[11] ECAP4 22[13]
V9 MIBSPI3CLK 22[16] AD1EXT_SEL[1] 22[17] eQEP1A 22[21]
V10 MIBSPI3NCS[0] 22[24] AD2EVT 22[25] eQEP1I 22[29]
0x16C V5 MIBSPI3NCS[1] 23[0] MDCLK 23[2] N2HET1[25] 23[3]
B2 MIBSPI3NCS[2] 23[8] I2C1_SDA 23[9] N2HET1[27] 23[11] nTZ1_2 23[13]
C3 MIBSPI3NCS[3] 23[16] I2C1_SCL 23[17] N2HET1[29] 23[19] nTZ1_1 23[21]
W9 MIBSPI3NENA 23[24] MIBSPI3NCS[5] 23[25] N2HET1[31] 23[27] eQEP1B 23[29]
0x170 W8 MIBSPI3SIMO 24[0] AD1EXT_SEL[0] 24[1] ECAP3 24[5]
V8 MIBSPI3SOMI 24[8] AD1EXT_ENA 24[9] ECAP2 24[13]
H19 MIBSPI5CLK 24[16] DMM_DATA[4] 24[17] MII_TXEN 24[18] RMII_TXEN 24[19]
E19 MIBSPI5NCS[0] 24[24] DMM_DATA[5] 24[25] ePWM4A 24[29]
0x174 B6 MIBSPI5NCS[1] 25[0] DMM_DATA[6] 25[1]
W6 MIBSPI5NCS[2] 25[8] DMM_DATA[2] 25[9]
T12 MIBSPI5NCS[3] 25[16] DMM_DATA[3] 25[17]
H18 MIBSPI5NENA 25[24] DMM_DATA[7] 25[25] MII_RXD[3] 25[26] ECAP5 25[29]
0x178 J19 MIBSPI5SIMO[0] 26[0] DMM_DATA[8] 26[1] MII_TXD[1] 26[2] RMII_TXD[1] 26[3]
E16 MIBSPI5SIMO[1] 26[8] DMM_DATA[9] 26[9] AD1EXT_SEL[0] 26[12]
H17 MIBSPI5SIMO[2] 26[16] DMM_DATA[10] 26[17] AD1EXT_SEL[1] 26[20]
G17 MIBSPI5SIMO[3] 26[24] DMM_DATA[11] 26[25] I2C2_SDA 26[26] AD1EXT_SEL[2] 26[28]