Datasheet

System and Peripheral Control Registers

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2.5.3.32 Peripheral Frame n MasterID Protection Register_L/H (PS[1-31]MSTID_L/H)

Figure 2-103. Peripheral Frame n MasterID Protection Register_L/H (PSnMSTID_L/H)

(offset = 308h-3FCh)

31 16

PSn_QUAD3_MSTID or PSn_QUAD1_MSTID

R/WP-FFFFh

15 0

PSn_QUAD2_MSTID or PSn_QUAD0_MSTID

R/WP-FFFFh

LEGEND: R/W = Read/Write; R = Read only; WP = Write in privileged mode only; -n = value after reset

Table 2-117. Peripheral Frame n MasterID Protection Register_L/H (PSnMSTID_L/H)

Field Descriptions

Bit Field Value Description

31-16 PSn_QUAD3_MSTID or n: 1 to 31. L: quadrant0 and quadrant1. H: quadrant2 and quadrant3.

PSn_QUAD1_MSTID MasterID filtering for Quadrant 3 of PS[n] or Quadrant 1 of PS[n]

0 Read: The corresponding master-id is not permitted to access the peripheral

Write: Disable the permission of the corresponding master to access the peripheral

1 Read: The corresponding master-id is permitted to access the peripheral

Write: Enable the permission of the corresponding master to access the peripheral

15-0 PSn_QUAD2_MSTID or MasterID filtering for Quadrant 2 of PS[n] or Quadrant 0 of PS[n]

PSn_QUAD0_MSTID

0 Read: The corresponding master-id is not permitted to access the peripheral

Write: Disable the permission of the corresponding master to access the peripheral

1 Read: The corresponding master-id is permitted to access the peripheral

Write: Enable the permission of the corresponding master to access the peripheral

228

Architecture SPNU562–May 2014

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