Datasheet

Memory Organization

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Table 2-6 maps the different algorithms supported in application mode for the RAM groups. The table also

lists the background pattern options available for each algorithm.

Table 2-6. PBIST Algorithm Mapping

Available

ALGOMASK Memories Background Valid RAMINFO

Sr. No. Register Value Algorithm Under Test Patterns Valid RAM Groups Register Value

1 0x00000001 triple_read_slow_read rom 1,2,3,4 0x0000000F

2 0x00000002 triple_read_fast_read rom 1,2,3,4 0x0000000F

3 0x00000004 march13n two_port 0x00000000, 5,6,7,8,9,10,11,12,13, 0x0FFFFFF0

0x96699669, 14,15,16,17,18,19,20,

0x0F0F0F0F, 21,22,23,24,25,26,27,

0xAA55AA55, 28

0xC3C3C3C3

4 0x00000008 march13n single_port 0x00000000, 29,30,31,32,33,34,35, 0xF0000000,

0x96699669, 36,37,38 0x0000003F

0x0F0F0F0F,

0xAA55AA55,

0xC3C3C3C3

NOTE: Recommended Memory Test Algorithm

March13 is the most recommended algorithm for the memory self-test.

For GCLK = 300 MHz, HCLK = 150 MHz, VCLK = 75 MHz, PBIST ROM_CLK = 75 MHz, the March13

algorithm takes about 29.08 ms to run on all on-chip SRAMs.

NOTE: PBIST ROM_CLK can be prescaled from GCLK via ROM_DIV bits of the MSTGCR register.

The valid ratio is either /1, /2 or /4 or /8. See Section 2.5.1.20 for detail. Maximum PBIST

ROM_CLK frequency supported is 82.5MHz.

124

Architecture SPNU562–May 2014

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