Datasheet

Endianism Considerations

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1.3 Endianism Considerations

1.3.1 RM57Lx: Little Endian (LE)

The RM57Lx family is based on the ARM® Cortex™-R5F core. ARM has designed this core to be used in

big-endian and little-endian systems. For the TI RM57Lx family, the endianness has been configured to

little-endian. Little-endian systems store the least-significant byte of a multi-byte data field in the lowest

memory address. Also, the address of the multi-byte data field is the lowest address. Following is an

example of the physical addresses of individual bytes.

Figure 1-2. Example: SPIDELAY – 0xFFF7F448

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

C2TDELAY[7:0] T2CDELAY[7:0]

Byte 3 - 0xFFF7F44B Byte 2 - 0xFFF7F44A

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

T2EDELAY[7:0] C2EDELAY[7:0]

Byte 1 - 0xFFF7F449 Byte 0 - 0xFFF7F448

32-bit accesses to this register should use the lowest address, that is, 0xFFF7F448. Writing 0x11223344

to address 0xFFF7F448 shows the following when viewing the memory in 8-bit and 32-bit modes.

As such, the headers provided as part of HALCoGen do take the endianness into account and provide

header structures that are agnostic to endianness. This is achieved by using C directives for the compiler

that make use of the compile options configured for the project by the user (__little_endian__ used in

Code Composer Studio codegen tools). This directive may need to be adapted for other compilers.

#ifdef __little_endian__

char C2EDELAY : 8U; /**lt; 0xF448: CS to ENA */

char T2EDELAY : 8U; /**lt; 0xF449: Transmit to ENA */

char T2CDELAY : 8U; /**lt; 0xF44A: Transmit to CS */

char C2TDELAY : 8U; /**lt; 0xF44B: CS to Transmit */

#else

char C2TDELAY : 8U; /**lt; 0xF448: CS to Transmit */

char T2CDELAY : 8U; /**lt; 0xF449: Transmit to CS */

char T2EDELAY : 8U; /**lt; 0xF44A: Transmit to ENA */

char C2EDELAY : 8U; /**lt; 0xF44B: CS to ENA */

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Introduction SPNU562–May 2014

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