Datasheet
www.ti.com
23-48. NHET Pin Disable Register (HETPINDIS) Field Descriptions ...................................................... 993
23-49. Instruction Summary ..................................................................................................... 994
23-50. FLAGS Generated by Instruction ...................................................................................... 995
23-51. Interrupt Capable Instructions........................................................................................... 995
23-52. Arithmetic / Bitwise Logic Sub-Opcodes ............................................................................ 1007
23-53. Source Operand Choices .............................................................................................. 1007
23-54. Destination Operand Choices ......................................................................................... 1007
23-55. Shift Encoding ........................................................................................................... 1008
23-56. Execution Time for ADC, ADD, AND, OR, SBB, SUB, XOR Instructions ....................................... 1008
23-57. Move Types for ADM32 ............................................................................................... 1013
23-58. Edge Select Encoding for APCNT ................................................................................... 1016
23-59. Branch Condition Encoding for BR ................................................................................... 1019
23-60. DADM64 Control Field Description ................................................................................... 1024
23-61. Event Encoding Format for ECNT .................................................................................... 1031
23-62. Magnitude Compare Order for MCMP ............................................................................... 1033
23-63. Move Type Encoding Selection ....................................................................................... 1036
23-64. MOV64 Control Field Descriptions ................................................................................... 1040
23-65. Comparison Type Encoding Format ................................................................................. 1040
23-66. Counter Type Encoding Format ...................................................................................... 1043
23-67. Comparison Type Encoding Format ................................................................................. 1049
23-68. RADM64 Control Field Descriptions ................................................................................. 1049
23-69. Step Width Encoding for SCNT ....................................................................................... 1055
23-70. SHIFT MODE Encoding Format ...................................................................................... 1058
23-71. SHIFT Condition Encoding ............................................................................................ 1058
23-72. Event Encoding Format for WCAP ................................................................................... 1061
23-73. Event Encoding Format for WCAPE ................................................................................. 1063
24-1. CPENA / TMBx Priority Rules ......................................................................................... 1072
24-2. Triggered Control Packets ............................................................................................. 1075
24-3. DCP RAM ................................................................................................................ 1078
24-4. DCP Parity RAM......................................................................................................... 1078
24-5. Field Addresses of the WCAP, ECNT, PCNT Example............................................................ 1079
24-6. 32-Bit-Transfer of Data Fields ........................................................................................ 1080
24-7. Destination Buffer Values .............................................................................................. 1080
24-8. 64-Bit-Transfer of Control Field and Data Fields ................................................................... 1081
24-9. Destination Buffer Values .............................................................................................. 1081
24-10. HTU Control Registers.................................................................................................. 1082
24-11. Global Control Register (HTU GC) Field Descriptions ............................................................. 1083
24-12. Control Packet Enable Register (HTU CPENA) Field Descriptions .............................................. 1084
24-13. CPENA Write Results................................................................................................... 1084
24-14. CPENA Read Results .................................................................................................. 1084
24-15. Control Packet (CP) Busy Register 0 (HTU BUSY0) Field Descriptions......................................... 1085
24-16. Control Packet (CP) Busy Register 1 (HTU BUSY1) Field Descriptions......................................... 1086
24-17. Control Packet (CP) Busy Register 2 (HTU BUSY2) Field Descriptions......................................... 1086
24-18. Control Packet (CP) Busy Register 3 (HTU BUSY3) Field Descriptions......................................... 1087
24-19. Active Control Packet and Error Register (HTU ACPE) Field Descriptions ..................................... 1087
24-20. Request Lost and Bus Error Control Register (HTU RLBECTRL) Field Descriptions.......................... 1089
24-21. Buffer Full Interrupt Enable Set Register (HTU BFINTS) Field Descriptions.................................... 1090
24-22. Buffer Full Interrupt Enable Clear Register (HTU BFINTC) Field Descriptions ................................. 1090
24-23. Interrupt Mapping Register (HTU INTMAP) Field Descriptions ................................................... 1091
82
List of Tables SPNU562–May 2014
Submit Documentation Feedback
Copyright © 2014, Texas Instruments Incorporated