Datasheet

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7-1. ECC Encoding............................................................................................................. 326
7-2. Syndrome Table .......................................................................................................... 327
7-3. Alternate Syndrome Table............................................................................................... 328
7-4. TI OTP Bank 0 Sector Information Field Descriptions ............................................................... 330
7-5. TI OTP Sector Information Address .................................................................................... 330
7-6. TI OTP Bank 0 Package and Memory Size Information Field Descriptions ...................................... 331
7-7. TI OTP Bank 0 LPO Trim and Max HCLK Information Field Descriptions ........................................ 331
7-8. TI OTP Bank 0 Temperature Sensor Calibration Information Field Descriptions ................................ 333
7-9. DIAGMODE Encoding.................................................................................................... 334
7-10. Diagnostic Mode Summary.............................................................................................. 336
7-11. Errors in L2FMC .......................................................................................................... 338
7-12. Flash Control Registers.................................................................................................. 339
7-13. Flash Read Control Register (FRDCNTL) Field Descriptions....................................................... 340
7-14. Flash Read Control Register (FRDCNTL) Field Descriptions....................................................... 341
7-15. Flash PortA Error and Status Register (FEDAC_PASTATUS) Field Descriptions ............................... 342
7-16. Flash PortB Error and Status Register (FEDAC_PBSTATUS) Field Descriptions ............................... 343
7-17. Flash Global Error and Status Register (FEDAC_GBLSTATUS) Field Descriptions ............................ 344
7-18. Flash Error Detection and Correction Sector Disable Register (FEDACSDIS) Field Descriptions ............ 345
7-19. Primary Address Tag Register (FPRIM_ADD)_TAG Field Descriptions .......................................... 346
7-20. Duplicate Address Tag Register (FDUP_ADD)_TAG Field Descriptions.......................................... 346
7-21. Flash Bank Protection Register (FBPROT) Field Descriptions ..................................................... 347
7-22. Flash Bank Sector Enable Register (FBSE) Field Descriptions .................................................... 347
7-23. Flash Bank Busy Register (FBBUSY) Field Descriptions ........................................................... 348
7-24. Flash Bank Access Control Register (FBAC) Field Descriptions................................................... 348
7-25. Flash Bank Power Mode Register (FBPWRMODE) Field Descriptions ........................................... 349
7-26. Flash Bank/Pump Ready Register (FBPRDY) Register Description............................................... 350
7-27. Flash Pump Access Control Register 1 (FPAC1) Field Descriptions .............................................. 351
7-28. Flash Module Access Control Register (FMAC) Field Descriptions................................................ 352
7-29. Flash Module Status Register (FMSTAT) Field Descriptions ....................................................... 353
7-30. EEPROM Emulation Data MSW Register (FEMU_DMSW) Field Descriptions .................................. 355
7-31. EEPROM Emulation Data LSW Register (FEMU_DLSW) Field Descriptions .................................... 355
7-32. EEPROM Emulation ECC Register (FEMU_ECC) Field Descriptions............................................. 356
7-33. Flash Lock Register (FLOCK) Field Descriptions .................................................................... 356
7-34. Diagnostic Control Register (FDIAGCTRL) Field Descriptions ..................................................... 357
7-35. Raw Address Register (FRAW_ADDR) Field Descriptions ......................................................... 358
7-36. Parity Override Register (FPAR_OVR) Field Descriptions.......................................................... 359
7-37. Reset Configuration Valid Register (RCR_VALID) Field Descriptions............................................. 360
7-38. Crossbar Access Time Threshold Register (ACC_THRESHOLD) Field Descriptions........................... 360
7-39. Flash Error Detection and Correction Sector Disable Register 2 (FEDACSDIS2) Field Descriptions......... 361
7-40. Lower Word of Reset Configuration Read Register (RCR_VALUE0) Field Descriptions ....................... 362
7-41. Upper Word of Reset Configuration Read Register (RCR_VALUE1) Field Descriptions ....................... 362
7-42. FSM Register Write Enable Register (FSM_WR_ENA) Field Descriptions ....................................... 363
7-43. EPROM Emulation Configuration Register (EEPROM_CONFIG) Field Descriptions ........................... 363
7-44. FSM Sector Register 1 (FSM_SECTOR1) Field Descriptions...................................................... 364
7-45. FSM Sector Register 2 (FSM_SECTOR2) Field Descriptions...................................................... 364
7-46. Flash Bank Configuration Register (FCFG_BANK) Field Descriptions............................................ 365
7-47. POM Control Registers .................................................................................................. 366
7-48. POM Global Control Register (POMGLBCTRL) Field Descriptions................................................ 366
7-49. POM Revision ID Register (POMREV) Field Descriptions .......................................................... 367
70
List of Tables SPNU562–May 2014
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