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23.4.11 Interrupt Flag Register (HETFLG) .......................................................................... 976
23.4.12 AND Share Control Register (HETAND) .................................................................. 977
23.4.13 HR Share Control Register (HETHRSH)................................................................... 978
23.4.14 XOR Share Control Register (HETXOR)................................................................... 979
23.4.15 Request Enable Set Register (HETREQENS) ............................................................ 980
23.4.16 Request Enable Clear Register (HETREQENC).......................................................... 980
23.4.17 Request Destination Select Register (HETREQDS)...................................................... 981
23.4.18 NHET Direction Register (HETDIR) ........................................................................ 982
23.4.19 N2HET Data Input Register (HETDIN) ..................................................................... 983
23.4.20 N2HET Data Output Register (HETDOUT) ................................................................ 983
23.4.21 NHET Data Set Register (HETDSET) ...................................................................... 984
23.4.22 N2HET Data Clear Register (HETDCLR).................................................................. 984
23.4.23 N2HET Open Drain Register (HETPDR)................................................................... 985
23.4.24 N2HET Pull Disable Register (HETPULDIS) .............................................................. 985
23.4.25 N2HET Pull Select Register (HETPSL) .................................................................... 986
23.4.26 Parity Control Register (HETPCR).......................................................................... 987
23.4.27 Parity Address Register (HETPAR)......................................................................... 988
23.4.28 Parity Pin Register (HETPPR)............................................................................... 989
23.4.29 Suppression Filter Preload Register (HETSFPRLD) ..................................................... 990
23.4.30 Suppression Filter Enable Register (HETSFENA)........................................................ 990
23.4.31 Loop Back Pair Select Register (HETLBPSEL) ........................................................... 991
23.4.32 Loop Back Pair Direction Register (HETLBPDIR) ........................................................ 992
23.4.33 N2HET Pin Disable Register (HETPINDIS) ............................................................... 993
23.5 Instruction Set ............................................................................................................ 994
23.5.1 Instruction Summary ........................................................................................... 994
23.5.2 Abbreviations, Encoding Formats and Bits ................................................................. 996
23.5.3 Instruction Description ......................................................................................... 999
24 High-End Timer Transfer Unit (HTU) Module....................................................................... 1064
24.1 Overview.................................................................................................................. 1065
24.1.1 Features ........................................................................................................ 1065
24.2 Module Operation ....................................................................................................... 1066
24.2.1 Data Transfers between Main RAM and NHET RAM .................................................... 1068
24.2.2 Arbitration of HTU Elements and Frames.................................................................. 1073
24.2.3 Conditions for Frame Transfer Interruption ................................................................ 1073
24.2.4 HTU Overload and Request Lost Detection ............................................................... 1074
24.2.5 Memory Protection ............................................................................................ 1076
24.2.6 Control Packet RAM Parity Checking ...................................................................... 1077
24.3 Use Cases................................................................................................................ 1079
24.3.1 Example: Single Element Transfer with One Trigger Request.......................................... 1079
24.3.2 Example: Multiple Element Transfer with One Trigger Request ........................................ 1079
24.3.3 Example: 64-Bit-Transfer of Control Field and Data Fields.............................................. 1081
24.4 HTU Control Registers.................................................................................................. 1082
24.4.1 Global Control Register (HTU GC).......................................................................... 1083
24.4.2 Control Packet Enable Register (HTU CPENA)........................................................... 1084
24.4.3 Control Packet (CP) Busy Register 0 (HTU BUSY0)..................................................... 1085
24.4.4 Control Packet (CP) Busy Register 1 (HTU BUSY1)..................................................... 1086
24.4.5 Control Packet (CP) Busy Register 2 (HTU BUSY2)..................................................... 1086
24.4.6 Control Packet (CP) Busy Register 3 (HTU BUSY3)..................................................... 1087
24.4.7 Active Control Packet and Error Register (HTU ACPE).................................................. 1087
24.4.8 Request Lost and Bus Error Control Register (HTU RLBECTRL)...................................... 1089
24.4.9 Buffer Full Interrupt Enable Set Register (HTU BFINTS) ................................................ 1090
24.4.10 Buffer Full Interrupt Enable Clear Register (HTU BFINTC) ............................................ 1090
24.4.11 Interrupt Mapping Register (HTU INTMAP) .............................................................. 1091
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SPNU562–May 2014 Contents
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