Datasheet
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17.3.1 RTI Global Control Register (RTIGCTRL)................................................................... 576
17.3.2 RTI Timebase Control Register (RTITBCTRL) ............................................................. 577
17.3.3 RTI Capture Control Register (RTICAPCTRL).............................................................. 578
17.3.4 RTI Compare Control Register (RTICOMPCTRL) ......................................................... 579
17.3.5 RTI Free Running Counter 0 Register (RTIFRC0) ......................................................... 580
17.3.6 RTI Up Counter 0 Register (RTIUC0)........................................................................ 580
17.3.7 RTI Compare Up Counter 0 Register (RTICPUC0) ........................................................ 581
17.3.8 RTI Capture Free Running Counter 0 Register (RTICAFRC0) ........................................... 581
17.3.9 RTI Capture Up Counter 0 Register (RTICAUC0).......................................................... 582
17.3.10 RTI Free Running Counter 1 Register (RTIFRC1)........................................................ 582
17.3.11 RTI Up Counter 1 Register (RTIUC1) ...................................................................... 583
17.3.12 RTI Compare Up Counter 1 Register (RTICPUC1)....................................................... 584
17.3.13 RTI Capture Free Running Counter 1 Register (RTICAFRC1) ......................................... 585
17.3.14 RTI Capture Up Counter 1 Register (RTICAUC1) ........................................................ 585
17.3.15 RTI Compare 0 Register (RTICOMP0)..................................................................... 586
17.3.16 RTI Update Compare 0 Register (RTIUDCP0)............................................................ 586
17.3.17 RTI Compare 1 Register (RTICOMP1)..................................................................... 587
17.3.18 RTI Update Compare 1 Register (RTIUDCP1)............................................................ 587
17.3.19 RTI Compare 2 Register (RTICOMP2)..................................................................... 588
17.3.20 RTI Update Compare 2 Register (RTIUDCP2)............................................................ 588
17.3.21 RTI Compare 3 Register (RTICOMP3)..................................................................... 589
17.3.22 RTI Update Compare 3 Register (RTIUDCP3)............................................................ 589
17.3.23 RTI Timebase Low Compare Register (RTITBLCOMP) ................................................. 590
17.3.24 RTI Timebase High Compare Register (RTITBHCOMP) ................................................ 590
17.3.25 RTI Set Interrupt Enable Register (RTISETINTENA) .................................................... 591
17.3.26 RTI Clear Interrupt Enable Register (RTICLEARINTENA) .............................................. 593
17.3.27 RTI Interrupt Flag Register (RTIINTFLAG) ................................................................ 595
17.3.28 Digital Watchdog Control Register (RTIDWDCTRL) ..................................................... 596
17.3.29 Digital Watchdog Preload Register (RTIDWDPRLD)..................................................... 597
17.3.30 Watchdog Status Register (RTIWDSTATUS) ............................................................. 598
17.3.31 RTI Watchdog Key Register (RTIWDKEY) ................................................................ 599
17.3.32 RTI Digital Watchdog Down Counter (RTIDWDCNTR) .................................................. 600
17.3.33 Digital Windowed Watchdog Reaction Control (RTIWWDRXNCTRL) ................................. 600
17.3.34 Digital Windowed Watchdog Window Size Control (RTIWWDSIZECTRL)............................ 601
17.3.35 RTI Compare Interrupt Clear Enable Register (RTIINTCLRENABLE)................................. 602
17.3.36 RTI Compare 0 Clear Register (RTICMP0CLR) .......................................................... 603
17.3.37 RTI Compare 1 Clear Register (RTICMP1CLR) .......................................................... 603
17.3.38 RTI Compare 2 Clear Register (RTICMP2CLR) .......................................................... 604
17.3.39 RTI Compare 3 Clear Register (RTICMP3CLR) .......................................................... 604
18 Cyclic Redundancy Check (CRC) Controller Module ............................................................. 605
18.1 Overview ................................................................................................................... 606
18.1.1 Features.......................................................................................................... 606
18.1.2 Block Diagram................................................................................................... 606
18.2 Module Operation......................................................................................................... 608
18.2.1 General Operation .............................................................................................. 608
18.2.2 CRC Modes of Operation...................................................................................... 608
18.2.3 PSA Signature Register........................................................................................ 609
18.2.4 PSA Sector Signature Register ............................................................................... 610
18.2.5 CRC Value Register............................................................................................ 611
18.2.6 Raw Data Register ............................................................................................. 611
18.2.7 Example DMA Controller Setup............................................................................... 611
18.2.8 Pattern Count Register......................................................................................... 613
18.2.9 Sector Count Register/Current Sector Register ............................................................ 613
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SPNU562–May 2014 Contents
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