Datasheet

eFuse Controller Registers

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37.4.5 EFC Self Test Signature Register (EFCSTSIG)

Figure 37-6 and Table 37-7 describe the EFCSTSIG register.

Figure 37-6. EFC Self Test Cycles Register (EFCSTSIG) [offset = 4Ch]

31 16

Signature

R/W-0

15 0

Signature

R/W-0

LEGEND: R/W = Read/Write; -n = value after power-on reset (nPORRST)

Table 37-7. EFC Self Test Cycles Register (EFCSTSIG) Field Descriptions

Bit Name Description

31–0 Signature This register is used to hold the expected signature for the eFuse ECC logic self test. It is recommended to

write a value of 0x5362F97F to this register and a value of 600 to the EFCSTCT register. If after running

the eFuse ECC logic self test, the calculated signature does not match the expected signature in the

EFCSTSIG register, then a value of 11000b is stored in the EFCERRSTAT register.

1912

eFuse Controller SPNU562–May 2014

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