Datasheet

www.ti.com eFuse Controller Registers
Table 37-3. EFC Boundary Register (EFCBOUND) Field Descriptions (continued)
Bit Field Value Description
19 EFC Instruction Error This bit drives the instruction error signal when bit 15 (Instruction Error OE) is high. This
signal is used to denote an error occurred during e-fuse programming. This signal is not
attached to the ESM.
0 Drives the Instruction Error signal low if Instruction Error OE is high
1 Drives the Instruction Error signal high if Instruction Error OE is high
18 EFC Autoload Error This bit drives the Autoload Error signal when bit 14 (Autoload Error OE) is high. This signal
is attached to ESM error Group 3, Channel 1.
0 Drives the Autoload Error signal low if Autoload Error OE is high
1 Drives the Autoload Error signal high if Autoload Error OE is high
17 Self Test Error OE The Self Test Error Output Enable bit determines if the EFC Self Test signal comes from the
eFuse controller or from bit 21 of the boundary register.
0 EFC Self Test Error comes from eFuse controller
1 EFC Self Test Error comes from the boundary register
16 Single Bit Error OE The single bit error output enable signal determines if the EFC Single Bit Error signal comes
from the eFuse controller or from bit 20 of the boundary register.
0 EFC Single Bit Error comes from eFuse controller
1 EFC Single Bit Error comes from the boundary register
15 Instruction Error OE The instruction error output enable signal determines if the EFC Instruction Error signal
comes from the eFuse controller or from bit 19 of the boundary register.
0 EFC Instruction Error comes from eFuse controller
1 EFC Instruction Error comes from the boundary register
14 Autoload Error OE The autoload error output enable signal determines if the EFC Autoload Error signal comes
from the eFuse controller or from bit 18 of the boundary register.
0 EFC Autoload Error comes from eFuse controller
1 EFC Autoload Error comes from the boundary register
13 EFC ECC Selftest The eFuse Controller ECC Selftest Enable bit starts the selftest of the ECC logic if the four
Enable input enable bits (EFCBOUND[3:0) are all 1s.
0 No action
1 Start ECC selftest if EFCBOUND[3:0] are Fh.
12-4 Reserved 0 Read returns 0. Writes have no effect.
3-0 Input Enable The eFuse Controller ECC Selftest Enable bit starts the selftest of the ECC logic if the four
input enable bits (EFCBOUND[3:0) are all 1s.
Fh ECC selftest can be started if “ EFC ECC Selftest Enable”, bit 13, is set
All others ECC selftest cannot be started.
1909
SPNU562–May 2014 eFuse Controller
Submit Documentation Feedback
Copyright © 2014, Texas Instruments Incorporated