Datasheet

www.ti.com RTP Control Registers
36.3.17 RTP Pin Control 8 Register (RTPPC8)
This register configures the internal pullup or pulldown on the input pin. A secondary function exists when
the pull configuration is disabled and a pulldown is selected. This will disable the input buffer. Figure 36-25
and Table 36-26 describe this register.
NOTE: If the pullup/down is disabled in the RTPPC7 register and configured as pulldown in
RTPPC8, then the input buffer is disabled.
Figure 36-25. RTP Pin Control 8 Register (RTPPC8) (offset = 54h)
31 19 18 17 16
Reserved ENAPSEL CLKPSEL SYNCPSEL
R-0 R/W-1 R/W-1 R/W-1
15 0
DATAPSEL[15:0]
R/W-1
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 36-26. RTP Pin Control 8 Register (RTPPC8) Field Descriptions
Bit Field Value Description
31-19 Reserved 0 Read returns 0. Writes have no effect.
18 ENAPSEL RTPENA Pull select. This bit configures pullup or pulldown functionality if RTPPC7[18] = 0.
Read:
0 Pulldown functionality is enabled
1 Pullup functionality is enabled
Write:
0 Enables pulldown functionality
1 Enables pullup functionality
17 CLKPSEL RTPCLK Pull select. This bit configures pullup or pulldown functionality if RTPPC7[17] = 0.
Read:
0 Pulldown functionality is enabled
1 Pullup functionality is enabled
Write:
0 Enables pulldown functionality
1 Enables pullup functionality
16 SYNCPSEL RTPSYNC Pull select. This bit configures pullup or pulldown functionality if RTPPC7[16] = 0.
Read:
0 Pulldown functionality is enabled
1 Pullup functionality is enabled
Write:
0 Enables pulldown functionality
1 Enables pullup functionality
15-0 DATAPSEL[n] RTPDATA[15:0] Pull select. These bits configure pullup or pulldown functionality if RTPPC7[15:0] =
0. Each bit [n] represents a single pin.
Read:
0 Pulldown functionality is enabled
1 Pullup functionality is enabled
Write:
0 Enables pulldown functionality
1 Enables pullup functionality
1903
SPNU562–May 2014 RAM Trace Port (RTP)
Submit Documentation Feedback
Copyright © 2014, Texas Instruments Incorporated