Datasheet

www.ti.com
RTP Control Registers
Table 36-11. RTP Trace Enable Register (RTPTRENA) Field Descriptions (continued)
Bit Field Value Description
0 ENA1 Enable tracing for RAM block 1. This bit enables tracing into FIFO1 in Trace Mode (read/write) or Direct
Data Mode (read) operations. In Direct Data Mode write operations, this bit will be ignored and tracing
into FIFO1 will be disabled.
Read:
0 Tracing is disabled.
1 Tracing is enabled.
Write in Privilege:
0 Disable tracing. If RTPGLBCTRL.ON/OFF = Ah, data already captured in FIFO1 will still be transmitted.
1 Enable tracing.
1885
SPNU562May 2014 RAM Trace Port (RTP)
Submit Documentation Feedback
Copyright © 2014, Texas Instruments Incorporated