Datasheet
Control Registers
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Table 35-27. DMM Pin Control 5 (DMMPC5) Field Descriptions (continued)
Bit Field Value Description
0 SYNCCLR Sets output state of DMMSYNC pin to logic low. Value in the SYNCCLR bit clears the data
output control register bit to 0 regardless of the current value in the DATAxOUT bit.
User and privilege mode (read):
0 Logic low (output voltage is V
OL
or lower)
1 Logic high (output voltage is V
OH
or higher)
User and privilege mode (write):
0 State of the pin is unchanged
1 Clears the pin to logic low (output voltage is set to V
OL
or lower)
35.3.22 DMM Pin Control 6 (DMMPC6)
These bits configure the pins in push-pull or open-drain functionality. If configured to be open-drain, the
module only drives a logic low level on the pin. An external pull-up resistor needs to be connected to the
pin to pull it high when the pin is in high-impedance mode.
Figure 35-28. DMM Pin Control 6 (DMMPC6) [offset = 84h]
31 24
Reserved
R-0
23 19 18 17 16
Reserved ENAPDR DATA15PDR DATA14PDR
R-0 R/W-0 R/W-0 R/W-0
15 14 13 12 11 10 9 8
DATA13PDR DATA12PDR DATA11PDR DATA10PDR DATA9PDR DATA8PDR DATA7PDR DATA6PDR
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
7 6 5 4 3 2 1 0
DATA5PDR DATA4PDR DATA3PDR DATA2PDR DATA1PDR DATA0PDR CLKPDR SYNCPDR
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 35-28. DMM Pin Control 6 (DMMPC6) Field Descriptions
Bit Field Value Description
31-19 Reserved 0 Reads returns 0. Writes have no effect.
18 ENAPDR Open Drain enable. Enables open drain functionality if the pin is configured as GIO output
(DMMPC0[18]=0; DMMPC1[18]=1). If the pin is configured as functional pin (DMMPC0[18]=1), the
open drain functionality is disabled.
User and privilege mode (read):
0 Pin behaves as normal push/pull pin
1 Pin operates in open drain mode
User and privilege mode (write):
0 Configures pin as push/pull
1 Configures pin as open drain
1866
Data Modification Module (DMM) SPNU562–May 2014
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