Datasheet

www.ti.com Control Registers
35.3.10 DMM Direct Data Mode Pointer Register (DMMDDMPT)
This register shows the pointer into the buffer programmed by DMMDDMDEST (Section 35.3.8) and
DMMDDMBL (Section 35.3.9).
Figure 35-16. DMM Direct Data Mode Pointer Register (DMMDDMPT) [offset = 24h]
31 16
Reserved
R-0
15 14 0
Rsvd POINTER
R-0 R-0
LEGEND: R = Read only; -n = value after reset
Table 35-16. DMM Direct Data Mode Pointer Register (DMMDDMPT) Field Descriptions
Bit Field Value Description
31-15 Reserved 0 Read returns 0. Writes have no effect.
14-0 POINTER These bits hold the pointer to the next entry to be written in the buffer. The pointer points to the
byte aligned address. If in 16-bit DDM mode, bit 0 will be 0. If in 32-bit DDM mode, bit 0 and 1
will be 0.
User and privilege mode (read): next data entry
Privilege mode (write): writes have no effect
35.3.11 DMM Direct Data Mode Interrupt Pointer Register (DMMINTPT)
This register can be programmed to hold a threshold to which the DMMDDMPT register (Section 35.3.10)
is compared. An interrupt can be generated when both match.
Figure 35-17. DMM Direct Data Mode Interrupt Pointer Register (DMMINTPT) [offset = 28h]
31 16
Reserved
R-0
15 14 0
Rsvd INTPT
R-0 R/WP-0
LEGEND: R/W = Read/Write; R = Read only; WP = Write in privilege mode only; -n = value after reset
Table 35-17. DMM Direct Data Mode Interrupt Pointer Register (DMMINTPT) Field Descriptions
Bit Field Value Description
31-15 Reserved 0 Read returns 0. Writes have no effect.
14-0 INTPT Interrupt Pointer. When the buffer pointer (Section 35.3.10) matches the programmed value in
DMMINTPT and the PROG_BUF interrupt (Section 35.3.2) is set, an interrupt is generated.
User and privilege mode (read): current interrupt threshold
Privilege mode (write): new interrupt threshold
1853
SPNU562–May 2014 Data Modification Module (DMM)
Submit Documentation Feedback
Copyright © 2014, Texas Instruments Incorporated