Datasheet

www.ti.com

Control Registers

Table 35-9. DMM Interrupt Clear Register (DMMINTCLR) Field Descriptions (continued)

Bit Field Value Description

0 PACKET_ERR_INT Packet Error.This disables the interrupt generation in case of an error condition in the

packet reception. Please refer to Section 35.2.3for the error conditions.

User and privilege mode (read):

0 No interrupt will be generated

1 An interrupt will be generated

Privilege mode (write):

0 No influence on bit

1 Disable interrupt (clears corresponding bit in DMMINTCLR; DMM Interrupt Level Register

(DMMINTLVL))

1843

SPNU562–May 2014 Data Modification Module (DMM)

Submit Documentation Feedback