Datasheet

Offset(n)
Window(n)
Offset(n+1)
Window(n+1)
Period
Offset(n)
Window(n)
Offset(n+1)
Window(n+1)
Offset(n)
Window(n)
Offset(n+1)
Window(n+1)
TBCLK
CTR = PRD
orCTR = 0
BLANKWDW
BLANKWDW
BLANKWDW
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ePWM Submodules
Figure 34-50. Blanking Window Timing Diagram
34.2.10 Proper Interrupt Initialization Procedure
When the ePWM peripheral clock is enabled it may be possible that interrupt flags may be set due to
spurious events due to the ePWM registers not being properly initialized. The proper procedure for
initializing the ePWM peripheral is as follows:
1. Disable global interrupts (CPU INTM flag)
2. Disable ePWM interrupts
3. Set TBCLKSYNC = 0
4. Initialize peripheral registers
5. Set TBCLKSYNC = 1
6. Clear any spurious ePWM flags (including interrupt flags)
7. Enable ePWM interrupts
8. Enable global interrupts
1771
SPNU562May 2014 Enhanced Pulse Width Modulator (ePWM) Module
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