Datasheet

Event A
Qual
DCAL
DCAEVT1
DCAEVT2
Event
Triggering
DCAEVT1
.inter
DCAE
VT2.inter
DCBEVT1.soc
D C B E V T 1
. i
n
t
e
r
DCBEVT2.inter
DCAEVT1.sy
nc
D C A E V T 1
.
s
o c
DCBEVT1.sync
DCBH
Event B
Qual
DCBL
DCBEVT1
DCBEVT2
Event
Filtering
Blanking
Window
Counter
Capture
DCEVTFILT
D
C
T
R
I
P
S
E
L
TZ1
TZ2
TZ3
DCAH
Digital Compare Submodule
Time- Base
submodule
Trip- Zone
submodule
Event- Trigger
submodule
DC
AEVT1.force
DCAEVT2.force
DCBEVT1.f
orce
DCBEVT2.force
COMP
GPIO
MUX
Latch
Generate
SOC
Pulse
When
Input = 1
2-bit
Counter
Set
Clear
ClearCNT
IncCNT
ETPS[SOCBCNT]
ETPS[SOCBPRD]
ETCLR[SOCB]
SOCB
ETFRC[SOCB]
ETSEL[SOCB]
000
001
010
011
100
101
111
101
DCBEVT1.soc
[A]
ETFLG[SOCB]
CTR=Zero
CTR=PRD
CTRU=CMPA
CTRD=CMPA
CTRU=CMPB
CTRD=CMPB
ETSEL[SOCBSEL]
www.ti.com ePWM Submodules
Figure 34-43 shows the operation of the event-trigger's start-of-conversion-B (SOCB) pulse generator. The
event-trigger's SOCB pulse generator operates the same way as the SOCA.
Figure 34-43. Event-Trigger SOCB Pulse Generator
A The DCBEVT1.soc signals are signals generated by the Digital compare (DC) submodule, described in Section 34.2.9
34.2.9 Digital Compare (DC) Submodule
Figure 34-44 illustrates where the digital compare (DC) submodule signals interface to other submodules
in the ePWM system.
The digital compare (DC) submodule compares signals external to the ePWM module to directly generate
PWM events/actions which then feed to the event-trigger, trip-zone, and time-base submodules.
Additionally, blanking window functionality is supported to filter noise or unwanted pulses from the DC
event signals.
Figure 34-44. Digital-Compare Submodule High-Level Block Diagram
1765
SPNU562–May 2014 Enhanced Pulse Width Modulator (ePWM) Module
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