Datasheet

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• One-Shot (OSHT):
When a one-shot trip event occurs, the action specified in the TZCTL[TZA] and TZCTL[TZB] bits is
carried out immediately on the EPWMxA and/or EPWMxB output. Table 34-19 lists the possible
actions. In addition, the one-shot trip event flag (TZFLG[OST]) is set and a EPWMx_TZINT interrupt is
generated if it is enabled in the TZEINT register and VIM peripheral. The one-shot trip condition must
be cleared manually by writing to the TZCLR[OST] bit.
If the one-shot interrupt is enabled via the TZEINT register, and DCAEVT1 or DCBEVT1 are selected
as OSHT trip sources via the TZSEL register, it is not necessary to also enable the DCAEVT1 or
DCBEVT1 interrupts in the TZEINT register, as the DC events trigger interrupts through the OSHT
mechanism.
• Digital Compare Events (DCAEVT1/2 and DCBEVT1/2):
A digital compare DCAEVT1/2 or DCBEVT1/2 event is generated based on a combination of the
DCAH/DCAL and DCBH/DCBL signals as selected by the TZDCSEL register. The signals which
source the DCAH/DCAL and DCBH/DCBL signals are selected via the DCTRIPSEL register and can
be either trip zone input pins. For more information on the digital compare submodule signals, see
Section 34.2.9.
When a digital compare event occurs, the action specified in the TZCTL[DCAEVT1/2] and
TZCTL[DCBEVT1/2] bits is carried out immediately on the EPWMxA and/or EPWMxB output.
Table 34-19 lists the possible actions. In addition, the relevant DC trip event flag (TZFLG[DCAEVT1/2]
/ TZFLG[DCBEVT1/2]) is set and a EPWMx_TZINT interrupt is generated if it is enabled in the TZEINT
register and VIM peripheral.
The specified condition on the pins is automatically cleared when the DC trip event is no longer
present. The TZFLG[DCAEVT1/2] or TZFLG[DCBEVT1/2] flag bit will remain set until it is manually
cleared by writing to the TZCLR[DCAEVT1/2] or TZCLR[DCBEVT1/2] bit. If the DC trip event is still
present when the TZFLG[DCAEVT1/2] or TZFLG[DCBEVT1/2] flag is cleared, then it will again be
immediately set.
The action taken when a trip event occurs can be configured individually for each of the ePWM output
pins by way of the TZCTL register bit fields. One of four possible actions, shown in Table 34-19, can be
taken on a trip event.
Table 34-19. Possible Actions On a Trip Event
TZCTL Register bit- EPWMxA Comment
field Settings and/or
EPWMxB
0,0 High-Impedance Tripped
0,1 Force to High State Tripped
1,0 Force to Low State Tripped
1,1 No Change Do Nothing.
No change is made to the output.
1756
Enhanced Pulse Width Modulator (ePWM) Module SPNU562–May 2014
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