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ePWM Submodules

Although all combinations are supported, not all are typical usage modes. Table 34-14 documents some

classical dead-band configurations. These modes assume that the DBCTL[IN_MODE] is configured such

that EPWMxA In is the source for both falling-edge and rising-edge delay. Enhanced, or non-traditional

modes can be achieved by changing the input signal source. The modes shown in Table 34-14 fall into

the following categories:

• Mode 1: Bypass both falling-edge delay (FED) and rising-edge delay (RED)

Allows you to fully disable the dead-band submodule from the PWM signal path.

• Mode 2-5: Classical Dead-Band Polarity Settings:

These represent typical polarity configurations that should address all the active high/low modes

required by available industry power switch gate drivers. The waveforms for these typical cases are

shown in Figure 34-29. Note that to generate equivalent waveforms to Figure 34-29, configure the

action-qualifier submodule to generate the signal as shown for EPWMxA.

• Mode 6: Bypass rising-edge-delay and Mode 7: Bypass falling-edge-delay

Finally the last two entries in Table 34-14 show combinations where either the falling-edge-delay (FED)

or rising-edge-delay (RED) blocks are bypassed.

Table 34-14. Classical Dead-Band Operating Modes

DBCTL[POLSEL] DBCTL[OUT_MODE]

Mode Mode Description S3 S2 S1 S0

1 EPWMxA and EPWMxB Passed Through (No Delay) X X 0 0

2 Active High Complementary (AHC) 1 0 1 1

3 Active Low Complementary (ALC) 0 1 1 1

4 Active High (AH) 0 0 1 1

5 Active Low (AL) 1 1 1 1

EPWMxA Out = EPWMxA In (No Delay) 0 or 1 0 or 1 0 1

EPWMxB Out = EPWMxA In with Falling Edge Delay

EPWMxA Out = EPWMxA In with Rising Edge Delay 0 or 1 0 or 1 1 0

EPWMxB Out = EPWMxB In with No Delay

1747

SPNU562–May 2014 Enhanced Pulse Width Modulator (ePWM) Module

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