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eQEP Registers

33.3.4 eQEP Position-Compare Register (QPOSCMP)

Figure 33-24. eQEP Position-Compare Register (QPOSCMP)

31 0

QPOSCMP

R/W-0

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 33-7. eQEP Position-Compare Register (QPOSCMP) Field Descriptions

Bits Name Description

31-0 QPOSCMP The position-compare value in this register is compared with the position counter (QPOSCNT) to generate sync

output and/or interrupt on compare match.

33.3.5 eQEP Index Position Latch Register (QPOSILAT)

Figure 33-25. eQEP Index Position Latch Register (QPOSILAT) [offset = 10h]

31 0

QPOSILAT

R-0

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 33-8. eQEP Index Position Latch Register (QPOSILAT) Field Descriptions

Bits Name Description

31-0 QPOSILAT The position-counter value is latched into this register on an index event as defined by the QEPCTL[IEL] bits.

33.3.6 eQEP Strobe Position Latch Register (QPOSSLAT)

Figure 33-26. eQEP Strobe Position Latch Register (QPOSSLAT) [offset = 14h]

31 0

QPOSSLAT

R-0

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 33-9. eQEP Strobe Position Latch Register (QPOSSLAT) Field Descriptions

Bits Name Description

31-0 QPOSSLAT The position-counter value is latched into this register on strobe event as defined by the QEPCTL[SEL] bits.

1697

SPNU562–May 2014 Enhanced QEP (eQEP) Module

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