Datasheet

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31.5.23 Receive Unicast Clear Register (RXUNICASTCLEAR)
The receive unicast clear register (RXUNICASTCLEAR) is shown in Figure 31-61 and described in
Table 31-62.
Figure 31-61. Receive Unicast Clear Register (RXUNICASTCLEAR) (offset = 108h)
31 16
Reserved
R-0
15 8
Reserved
R-0
7 6 5 4 3 2 1 0
RXCH7EN RXCH6EN RXCH5EN RXCH4EN RXCH3EN RXCH2EN RXCH1EN RXCH0EN
R/W1C-0 R/W1C-0 R/W1C-0 R/W1C-0 R/W1C-0 R/W1C-0 R/W1C-0 R/W1C-0
LEGEND: R/W = Read/Write; R = Read only; W1C = Write 1 to clear (writing a 0 has no effect); -n = value after reset
Table 31-62. Receive Unicast Clear Register (RXUNICASTCLEAR) Field Descriptions
Bit Field Value Description
31-8 Reserved 0 Reserved
7 RXCH7EN 0-1 Receive channel 7 unicast enable clear bit. Write 1 to clear the enable, a write of 0 has no effect.
6 RXCH6EN 0-1 Receive channel 6 unicast enable clear bit. Write 1 to clear the enable, a write of 0 has no effect.
5 RXCH5EN 0-1 Receive channel 5 unicast enable clear bit. Write 1 to clear the enable, a write of 0 has no effect.
4 RXCH4EN 0-1 Receive channel 4 unicast enable clear bit. Write 1 to clear the enable, a write of 0 has no effect.
3 RXCH3EN 0-1 Receive channel 3 unicast enable clear bit. Write 1 to clear the enable, a write of 0 has no effect.
2 RXCH2EN 0-1 Receive channel 2 unicast enable clear bit. Write 1 to clear the enable, a write of 0 has no effect.
1 RXCH1EN 0-1 Receive channel 1 unicast enable clear bit. Write 1 to clear the enable, a write of 0 has no effect.
0 RXCH0EN 0-1 Receive channel 0 unicast enable clear bit. Write 1 to clear the enable, a write of 0 has no effect.
31.5.24 Receive Maximum Length Register (RXMAXLEN)
The receive maximum length register (RXMAXLEN) is shown in Figure 31-62 and described in Table 31-
63.
Figure 31-62. Receive Maximum Length Register (RXMAXLEN) (offset = 10Ch)
31 16
Reserved
R-0
15 0
RXMAXLEN
R/W-5EEh
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 31-63. Receive Maximum Length Register (RXMAXLEN) Field Descriptions
Bit Field Value Description
31-16 Reserved 0 Reserved
15-0 RXMAXLEN 0-FFFFh Receive maximum frame length. These bits determine the maximum length of a received frame.
The reset value is 5EEh (1518). Frames with byte counts greater than RXMAXLEN are long
frames. Long frames with no errors are oversized frames. Long frames with CRC, code, or
alignment error are jabber frames.
1618
EMAC/MDIO Module SPNU562–May 2014
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