Datasheet
MDIO Registers
www.ti.com
31.4.12 MDIO User PHY Select Register 0 (USERPHYSEL0)
The MDIO user PHY select register 0 (USERPHYSEL0) is shown in Figure 31-36 and described in
Table 31-36.
Figure 31-36. MDIO User PHY Select Register 0 (USERPHYSEL0) (offset = 84h)
31 16
Reserved
R-0
15 8 7 6 5 4 0
Reserved LINKSEL LINKINTENB Rsvd PHYADRMON
R-0 R/W-0 R/W-0 R-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 31-36. MDIO User PHY Select Register 0 (USERPHYSEL0) Field Descriptions
Bit Field Value Description
31-8 Reserved 0 Reserved
7 LINKSEL Link status determination select bit. Default value is 0, which implies that the link status is
determined by the MDIO state machine. This is the only option supported on this device.
0 The link status is determined by the MDIO state machine.
1 Not supported.
6 LINKINTENB Link change interrupt enable. Set to 1 to enable link change status interrupts for PHY address
specified in PHYADRMON. Link change interrupts are disabled if this bit is cleared to 0.
0 Link change interrupts are disabled.
1 Link change status interrupts for PHY address specified in PHYADDRMON bits are enabled.
5 Reserved 0 Reserved
4-0 PHYADRMON 0-1Fh PHY address whose link status is to be monitored.
1594
EMAC/MDIO Module SPNU562–May 2014
Submit Documentation Feedback
Copyright © 2014, Texas Instruments Incorporated