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Architecture

31.2.4 MII / RMII Signal Multiplexing Control

In Each of the MII and RMII interface signals are multiplexed with other functions on this microcontroller.

The application must configure the control registers in the I/O multiplexing module in order to enable the

MII/RMII functionality on the corresponding I/Os. Table 31-3 shows the byte to be configured to enable the

MDIO functions. Table 31-4 shows the byte to be configured to enable the MII or RMII functions. Please

refer the I/O Multiplexing Module chapter of the technical reference manual for more details on the

procedure to configure the PINMMR registers.

Table 31-3. MDIO Multiplexing Control

MDIO Signal Name Control for Selecting EMAC / MDIO Signal

MDIO_CLK PINMMR21[31:24] = 0b00000100

MDIO_D PINMMR23 [7:0] = 0b00000100

Table 31-4. MII/RMII Multiplexing Control

MII / RMII Signal Name Control for Selecting MII Signal Control for Selecting RMII Signal

MII_TXCLK PINMMR30 [23:16] = 0b00000010 -

MII_TXD[3] PINMMR30 [7:0] = 0b00000100 -

MII_TXD[2] PINMMR21 [15:8] = 0b00000100 -

MII_TXD[1] / RMII_TXD[1] PINMMR26 [7:0] = 0b00000100 PINMMR26 [7:0] = 0b00001000

MII_TXD[0] / RMII_TXD[0] PINMMR27 [7:0] = 0b00000100 PINMMR27 [7:0] = 0b00001000

MII_TXEN / RMII_TXEN PINMMR24 [23:16] = 0b00000100 PINMMR24 [23:16] = 0b00001000

MII_COL PINMMR21 [23:16] = 0b00000100 -

MII_CRS / RMII_CRSDV PINMMR31 [7:0] = 0b00000100 PINMMR31 [7:0] = 0b00001000

MII_RXCLK / RMII_50MHZ_CLK PINMMR34 [15:8] = 0b00000100 PINMMR34 [15:8] = 0b00001000

MII_RXD[3] PINMMR25 [31:24] = 0b00000100 -

MII_RXD[2] PINMMR22 [15:8] = 0b00000100 -

MII_RXD[1] / RMII_RXD[1] PINMMR34 [7:0] = 0b00000010 PINMMR34 [7:0] = 0b00000100

MII_RXD[0] / RMII_RXD[0] PINMMR33 [31:24] = 0b00000100 PINMMR33 [31:24] = 0b00001000

MII_RXDV PINMMR34 23:16] = 0b00000100 -

MII_RXER / RMII_RXER PINMMR0 [7:0] = 0b00000100 PINMMR0 [7:0] = 0b00001000

1531

SPNU562–May 2014 EMAC/MDIO Module

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