Datasheet

173
RM57L843
www.ti.com SPNS215C –FEBRUARY 2014–REVISED JUNE 2016
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Peripheral Information and Electrical SpecificationsCopyright © 2014–2016, Texas Instruments Incorporated
(1) 1 LSB = (AD
REFHI
– AD
REFLO
)/ 2
12
for 12-bit mode
(2) 1 LSB = (AD
REFHI
– AD
REFLO
)/ 2
10
for 10-bit mode
Table 7-22. MibADC Operating Characteristics Over 3.0 V to 3.6 V Operating Conditions
(1)(2)
PARAMETER DESCRIPTION/CONDITIONS MIN MAX UNIT
CR
Conversion range over which specified
accuracy is maintained
AD
REFHI
- AD
REFLO
3 3.6 V
Z
SE
T
Zero Scale Offset
Difference between the first ideal transition (from
code 000h to 001h) and the actual transition
10-bit mode 1 LSB
12-bit mode 2 LSB
F
SE
T
Full Scale Offset
Difference between the range of the measured
code transitions (from first to last) and the range
of the ideal code transitions
10-bit mode 2 LSB
12-bit mode 3 LSB
E
DN
L
Differential nonlinearity error
Difference between the actual step width and the
ideal value. (See Figure 7-11)
10-bit mode –1 1.5 LSB
12-bit mode –1 2 LSB
E
IN
L
Integral nonlinearity error
Maximum deviation from the best straight line
through the MibADC. MibADC transfer
characteristics, excluding the quantization error.
10-bit mode –2 2 LSB
12-bit mode –2 2 LSB
E
TO
T
Total unadjusted error (after calibration)
Maximum value of the difference between an
analog value and the ideal midstep value.
10-bit mode –2 2 LSB
12-bit mode –4 4 LSB
(1) 1 LSB = (AD
REFHI
– AD
REFLO
)/ 2
12
for 12-bit mode
(2) 1 LSB = (AD
REFHI
– AD
REFLO
)/ 2
10
for 10-bit mode
Table 7-23. MibADC Operating Characteristics Over 3.6 V to 5.25 V Operating Conditions
(1)(2)
PARAMETER DESCRIPTION/CONDITIONS MIN MAX UNIT
CR
Conversion range over which specified
accuracy is maintained
AD
REFHI
- AD
REFLO
3.6 5.25 V
Z
SE
T
Zero Scale Offset
Difference between the first ideal transition (from
code 000h to 001h) and the actual transition
10-bit mode 1 LSB
12-bit mode 2 LSB
F
SE
T
Full Scale Offset
Difference between the range of the measured
code transitions (from first to last) and the range
of the ideal code transitions
10-bit mode 2 LSB
12-bit mode 3 LSB
E
DN
L
Differential nonlinearity error
Difference between the actual step width and the
ideal value. (See Figure 7-11)
10-bit mode –1 1.5 LSB
12-bit mode –1 3 LSB
E
IN
L
Integral nonlinearity error
Maximum deviation from the best straight line
through the MibADC. MibADC transfer
characteristics, excluding the quantization error.
10-bit mode –2 2 LSB
12-bit mode –4.5 2 LSB
E
TO
T
Total unadjusted error (after calibration)
Maximum value of the difference between an
analog value and the ideal midstep value.
10-bit mode –2 2 LSB
12-bit mode –6 5 LSB