Datasheet

1 1 1 71 1 11 1187 8
S Slave address
R/W
R/W
ACK ACK ACK ACK
DataData
PS Slave address
1 1 1
7
1
8 8
11
S
Slave address 1st byte
R/W
ACK ACK ACK
Slave address 2nd byte
Data
P
1 1 1
7 8 1 8 1
S Slave address
R/W
ACK
Data
ACK
1
Data
ACK P
www.ti.com I2C Module Operation
30.2.5.1 7-Bit Addressing Format
In the 7-bit addressing format (Figure 30-7), the first byte after the START condition consists of a 7-bit
slave address followed by the R/W bit (in the LSB). The R/W bit determines the direction of the data
transfer:
• R/W = 0: The master writes (transmits) data to the addressed slave.
• R/W = 1: The master reads (receives) data from the slave.
An extra clock cycle dedicated for acknowledgement (ACK) is inserted after each byte. If the ACK is
inserted by the slave after the first byte from the master, it is followed by n bits of data from the transmitter
(master or slave, depending on the R/W bit). The device I2C allows n to be a number between 2 to 8,
programmable by the bit count (BC) field of I2CMDR. After the data bits have been transferred, the
receiver inserts an ACK bit.
To select the 7-bit addressing format, write 0 to the expanded address enable (XA) bit of I2CMDR and
make sure the free data format mode is off (FDF = 0 in I2CMDR).
Figure 30-7. I2C Module 7-Bit Addressing Format
30.2.5.2 10-Bit Addressing Format
The 10-bit addressing format is similar to the 7-bit addressing format, but the master sends the slave
address in two separate byte transfers. In the 10-bit addressing format (Figure 30-8), the first byte is
11110b, the two MSBs of the 10-bit slave address, and the R/W bit. The ACK bit is inserted after each
byte. The second byte is the remaining 8 bits of the 10-bit slave address. The slave must send an
acknowledgement after each of the two byte transfers. Once the master has written the second byte to the
slave, the master can either write data or use repeated a START condition to change the data direction.
To select the 10-bit addressing format, write 1 to the expanded address enable (XA) bit of I2CMDR and
make sure the free data format mode is off (FDF = 0 in I2CMDR).
Figure 30-8. I2C Module 10-bit Addressing Format
30.2.5.3 Using the Repeated START Condition
At the end of each byte, the master can drive another START condition (Figure 30-9). Using this
capability, a master can transmit/receive any number of data bytes before generating a STOP condition.
The length of a data byte can be from 2 to 8 bits. The repeated START condition can be used with the 7-
bit addressing, 10-bit addressing, or the free data formats.
Figure 30-9. I2C Module 7-Bit Addressing Format with Repeated START
1493
SPNU562–May 2014 Inter-Integrated Circuit (I2C) Module
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